7906 datasheet(358/531 Pages) RENESAS

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POWER SAVING FUNCTIONS

7906 Group User’s Manual Rev.2.0

16-5

16.1.2 Particular function select register 1

Figure 16.1.3 shows the structure of the particular function select register 1.

Fig. 16.1.3 Structure of particular function select register 1

(1) System clock stop select bit at WIT (bit 3)

Setting this bit to “1” makes the following clocks inactive in the wait mode: the operating clocks for

the internal peripheral devices and fsys. (Refer to section “16.2 Inactivity of system clock in wait

mode.”)

16.1 Overview

(Note 2)

—

Notes 1: At power-on reset, this bit becomes “0.” At hardware reset or software reset, this bit retains the value just before reset.

2: Even when “1” is written, the bit status will not change.

3: Setting this bit to “1” must be performed just before execution of the WIT instruction. Also, after the wait state is termi-

nated, this bit must be cleared to “0” immediately.

(Note 1)

Particular function select register 1 (Address 6316)

b7 b6 b5 b4 b3 b2 b1 b0

Bit name

Bit

Function

At reset

R/W

STP-instruction-execution

status bit

WIT-instruction-execution

status bit

Fix this bit to “0.”

System clock stop select bit

at WIT

(Note 3)

Fix this bit to “0.”

The value is “0” at reading.

Timer B2 clock source select bit

(Valid in event counter mode.)

The value is “0” at reading.

0 : Normal operation.

1 : During execution of STP instruction

0 : Normal operation.

1 : During execution of WIT instruction

0 : External signal input to the TB2IN pin is counted.

1 : fX32 is counted.

0 : In the wait mode, system clock fsys is active.

1 : In the wait mode, system clock fsys is inactive.

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