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7906 Datasheet(PDF) 360 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 360 Page - Renesas Technology Corp |
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360 / 531 page ![]() POWER SAVING FUNCTIONS 7906 Group User’s Manual Rev.2.0 16-7 16.3 Stop of oscillation circuit, 16.4 Pin VREF disconnection 16.3 Stop of oscillation circuit When a stable clock externally generated is input to pin XIN, power consumption can be saved by setting the external clock input select bit to “1” to stop the drive circuit for oscillation between pins XIN and XOUT. (See Figure 16.1.1.) At this time, the output level at pin XOUT is fixed to “H.” Also, if the system clock select bit (bit 5 at address BC16) = “0,” the watchdog timer is not used when the stop mode is terminated owing to an interrupt request occurrence; therefore, the microcomputer can start instruction execution just after termination of the stop mode. When the system clock select bit = “1,” in this case, the watchdog timer is used. 16.4 Pin VREF disconnection When the A-D converter is not used, power consumption can be saved by setting the VREF connection select bit (See Figure 16.4.1) to “1.” It is because the reference voltage input pin (VREF) is disconnected from the ladder resistors of the A-D converter, and there is no current flow between them. When the VREF connection select bit has been cleared from “1” (VREF disconnected) to “0” (VREF connected), be sure to start the A-D conversion after an interval of 1 µs or more has elapsed. Fig. 16.4.1 Structure of A-D control register 1 0 1 2 3 4 5 6 7 Undefined Undefined 0 0 0 0 0 0 RW RW RW RW RW RW RW – A-D control register 1 (Address 1F16 ) A-D sweep pin select bits (Valid in the single sweep mode and repeat sweep mode 0.) (Note 1) Fix this bit to “0.” Resolution select bit A-D conversion frequency ( φAD) select bit 1 Fix this bit to “0.” VREF connection select bit (Note 4) The value is “0” at reading. 0 0 : Pins AN0 and AN1 (2 pins) 0 1 : Pins AN0 to AN3 (4 pins) (Note 2) 1 0 : Pins AN0 to AN4 (5 pins) (Notes 2, 3) 1 1 : Do not select. b1 b0 0 : 8-bit resolution mode 1 : 10-bit resolution mode See Table 12.2.1. 0 0 : Pin VREF is connected. 1 : Pin VREF is disconnected. Bit name Bit Function At reset R/W Notes 1: These bits are invalid in the one-shot and repeat modes. (They may be either “0” or “1.”) 2: When using pin AN3, be sure that the D-A0 output enable bit (bit 0 at address 9616) = “0” (output disabled). 3: When using pin AN4, be sure that the D-A1 output enable bit (bit 1 at address 9616) = “0” (output disabled). 4: When this bit is cleared from “1” to “0,” be sure to start the A-D conversion after an interval of 1 µs or more has elapsed. 5: Writing to each bit of the A-D control register 1 must be performed while the A-D converter halts, regardless of the A-D operation mode. 0 |
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