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7906 Datasheet(PDF) 364 Page - Renesas Technology Corp |
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7906 Datasheet(HTML) 364 Page - Renesas Technology Corp |
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364 / 531 page ![]() DEBUG FUNCTION 7906 Group User’s Manual Rev.2.0 17-3 17.2 Block description 17.2.1 Debug control register 0 Figure 17.2.2 shows the structure of the debug control register 0. (1) Detect condition select bits (bits 0 to 2) These bits are used to select an occurrence condition for an address matching detection interrupt request. This condition can be selected from the following: s Address matching detection 0 An address matching detection interrupt request occurs when the contents of PG and PC match with the address being set in the address compare register 0 (addresses 6816 to 6A16); (Refer to section “17.3 Address matching detection mode.”) s Address matching detection 1 An address matching detection interrupt request occurs when the contents of PG and PC match with the address being set in the address compare register 1 (addresses 6B16 to 6D16); (Refer to section “17.3 Address matching detection mode.”) s Address matching detection 2 An address matching detection interrupt request occurs when the contents of PG and PC match with the address being set in the address compare register 0 (addresses 6816 to 6A16) or address compare register 1 (addresses 6B16 to 6D16); (Refer to section “17.3 Address matching detection mode.”) s Out-of-address-area detection An address matching detection interrupt request occurs when the contents of PG and PC are less than the address being set in the address compare register 0 (addresses 6816 to 6A16) or larger than the address compare register 1 (addresses 6B16 to 6D16); (Refer to section “17.4 Out-of- address-area detection mode.”) Fig. 17.2.2 Structure of debug control register 0 0 1 2 3 4 5 6 7 Notes 1: These bits are valid when the detect enable bit (bit 5) = “1.” Therefore, these bits must be set before or simultaneously with setting of the detect enable bit to “1.” 2: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately before reset. Bit name Bit Debug control register 0 (Address 6616) Function Detect condition select bits (Note 1) Fix these bits to “00.” Detect enable bit Fix this bit to “0.” The value is “1” at reading. RW RW RW RW RW RW RW — b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 : Do not select. 0 0 1 : Address matching detection 0 0 1 0 : Address matching detection 1 0 1 1 : Address matching detection 2 1 0 0 : Do not select. 1 0 1 : Out-of-address-area detection 1 1 0 : 1 1 1 : b2 b1 b0 0 : Detection disabled. 1 : Detection enabled. (Note 2) (Note 2) (Note 2) (Note 2) (Note 2) (Note 2) (Note 2) 1 Do not select. 00 0 At reset R/W |
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