7906 datasheet(499/531 Pages) RENESAS

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APPENDIX

Appendix 6. Machine instructions

7906 Group User’s Manual Rev.2.0

20-94

Notes for machine instructions table

The table lists the minimum number of instruction cycles for each instruction. The number of cycle is

changed by the following condition.

• The value of the low-order bytes of DPR (DPRnL)

The number of cycle of the addressing mode related with DPRn (n = 0 to 3) is applied when DPRn = 0.

When DPRn

≠ 0, add 1 to the number of cycles.

• The number of bytes of instruction which fetched into the instruction queue buffer

• The address at read and write of memory (either even or odd)

• When the external area accessed in BYTE = Vcc level (at external data bus width 8 bits)

• The number of wait

Note 1.

The op code at the upper row is used for accumulator A, and the op code at the lower row is

used for accumulator B.

Note 2.

When handing 16-bit data with flag m = 0 in the immediate addressing mode, add 1 to the numder

of bytes.

Note 3.

When handing 16-bit data with flag m = 0, add 1 to the numder of bytes.

Note 4.

Imm is the immediate value specified with an operand (imm = 0–31).

Note 5.

The op code at the upper row is used for branching in the range of –128 to +127, and the op

code at the lower row is used for branching in the range of –32768 to +32767.

Note 6.

The BRK instruction is a instruction for debugger; it cannot be used.

Note 7.

Any value from 0 through 15 is placed in an “n.”

Note 8.

When handling 16-bit data with flag x = 0 in the immediate addressing mode, add 1 to the numder

of bytes.

Note 9.

The number of cycles is the case of the 16-bit ÷ 8-bit operation. In the case of the 32-bit ÷

16-bit operation, add 8 to the number of cycles.

Note 10. When a zero division interrupt occurs, the number of cycles is 16 cycles. It is regardless of the

data length.

Note 11. When placing a value in any of DPRs, the op code at the upper row is applied. When placing

values to multiple DPRs, the op code at the lower row is applied. The letter “i” represents the

number of DPRn specified: 1 to 4.

Note 12. A “?” indicates to the value of 4 bits which the bit corressing to the specified DPRn becomes “1.”

Note 13. When the source is in the immediate addressing mode and flag m = 0, add n (n = 0 to 15) to

the number of bytes.

Note 14. The number of cycles of the case of the 8-bit ✕ 8-bit operation. In the case of the 16-bit ✕

16-bit operation, add 4 to the number of cycles.

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