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7906 Datasheet(PDF) 519 Page - Renesas Technology Corp

Part # 7906
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  531 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7906 Datasheet(HTML) 519 Page - Renesas Technology Corp

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APPENDIX
7906 Group User’s Manual Rev.2.0
20-114
Appendix 9. M37906M4C-XXXFP electrical characteristics
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
f(fsys)
≤ 20 MHz
tc(TB)
tw(TBH)
tw(TBL)
tc(TB)
tw(TBH)
tw(TBL)
Timer B input (Count input in event counter mode)
Symbol
TBiIN input cycle time (one edge count)
TBiIN input high-level pulse width (one edge count)
TBiIN input low-level pulse width (one edge count)
TBiIN input cycle time (both edge count)
TBiIN input high-level pulse width (both edge count)
TBiIN input low-level pulse width (both edge count)
Parameter
Limits
Min.
80
40
40
160
80
80
Max.
ns
ns
ns
ns
ns
ns
Unit
Limits
Symbol
Parameter
Min.
Max.
Unit
16
× 109
f(fsys)
8
× 109
f(fsys)
8
× 109
f(fsys)
(800)
(400)
(400)
tc(TB)
tw(TBH)
tw(TBL)
TBiIN input cycle time
TBiIN input high-level pulse width
TBiIN input low-level pulse width
ns
ns
ns
Timer B input (Pulse period measurement mode)
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys)
≤ 20 MHz.
Limits
Symbol
Parameter
Min.
Max.
Unit
16
× 109
f(fsys)
8
× 109
f(fsys)
8
× 109
f(fsys)
(800)
(400)
(400)
tc(TB)
tw(TBH)
tw(TBL)
TBiIN input cycle time
TBiIN input high-level pulse width
TBiIN input low-level pulse width
ns
ns
ns
Timer B input (Pulse width measurement mode)
Note: The TBiIN input cycle time requires 4 or more cycles of a count source. The TBiIN input high-level pulse width and the TBiIN input low-level pulse width
respectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f2 at f(fsys)
≤ 20 MHz.
tc(CK)
tw(CKH)
tw(CKL)
td(C-Q)
th(C-Q)
tsu(D-C)
th(C-D)
Serial I/O
Symbol
CLKi input cycle time
CLKi input high-level pulse width
CLKi input low-level pulse width
TXDi output delay time
TXDi hold time
RXDi input setup time
RXDi input hold time
Parameter
Limits
Min.
200
100
100
0
20
90
Max.
80
ns
ns
ns
ns
ns
ns
ns
Unit



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