7906 datasheet(300/531 Pages) RENESAS

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A-D CONVERTER

7906 Group User’s Manual Rev.2.0

12-5

Fig. 12.2.2 Structure of A-D control register 0

12.2.1 A-D control registers 0, 1

Figures 12.2.2 and 12.2.3 show the structures of the A-D control registers 0 and 1.

12.2 Block description

Undefined

(Note 4)

Notes 1: These bits are invalid in the single sweep mode and repeat sweep mode 0. (Each may be either “0” or “1.”)

2: When using pin AN3, be sure that the D-A0 output enable bit (bit 0 at address 9616) = “0” (output disabled).

3: When using pin AN4, be sure that the D-A1 output enable bit (bit 1 at address 9616) = “0” (output disabled).

4: When writing to this bit, use the MOVM (MOVMB) or STA (STAB, STAD) instruction.

5: Writing to each bit (except writing of “0” to bit 6) of the A-D control register 0 must be performed while the A-D converter

halts, regardless of the A-D operation mode.

A-D control register 0 (Address 1E16)

Analog input pin select bits

(Valid in the one-shot and repeat

modes.)

(Note 1)

A-D operation mode select bits

Fix this bit to “0.”

A-D conversion start bit

A-D conversion frequency (

φAD)

select bit 0

b7 b6 b5 b4 b3 b2 b1 b0

0 0 0 : AN0 is selected.

0 0 1 : AN1 is selected.

0 1 0 : AN2 is selected.

0 1 1 : AN3 is selected.

(Note 2)

1 0 0 : AN4 is selected.

(Note 3)

1 0 1 : Do not select.

1 1 0 : Do not select.

1 1 1 : Do not select.

b2 b1 b0

0 0 : One-shot mode

0 1 : Repeat mode

1 0 : Single sweep mode

1 1 : Repeat sweep mode 0

b4 b3

Bit name

Bit

Function

At reset

R/W

0 : A-D conversion halts.

1 : A-D conversion starts.

See Table 12.2.1.

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