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7906 Datasheet(PDF) 307 Page - Renesas Technology Corp

Part # 7906
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  531 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7906 Datasheet(HTML) 307 Page - Renesas Technology Corp

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A-D CONVERTER
7906 Group User’s Manual Rev.2.0
12-12
12.3 A-D conversion method
12.3 A-D conversion method
The A-D converter compares the comparison voltage (Vref), which is internally generated according to the
contents of the successive approximation register, with the analog input voltage (VIN), which is input from
the analog input pin (ANi). By reflecting the comparison result on the successive approximation register, VIN
is converted into a digital value. When a trigger is generated, the A-D converter performs the following
processing:
➀ Determining bit 9 of the successive approximation register
The A-D converter compares Vref with VIN. At this time, the contents of the successive approximation
register is “10000000002” (initial value).
Bit 9 of the successive approximation register depends on the comparison result as follows:
When Vref < VIN, bit 9 = “1”
When Vref > VIN, bit 9 = “0”
➁ Determining bit 8 of the successive approximation register
After setting bit 8 of the successive approximation register to “1,” the A-D converter compares Vref with
VIN. Bit 8 depends on the comparison result as follows:
When Vref < VIN, bit 8 = “1”
When Vref > VIN, bit 8 = “0”
➂ Determining bits 7 to LSB of the successive approximation register
Operation ➁ is performed for each of bits 7 to 0 in the 10-bit resolution mode.
Operation ➁ is performed for each of bits 7 to 2 in the 8-bit resolution mode.
When the LSB is determined, the contents of the successive approximation register (in order words,
conversion result) are transferred to the A-D register i.
Vref is generated according to the latest contents of the successive approximation register. Table 12.3.1 lists
the relationship between the successive approximation register’s contents and Vref. Tables 12.3.2 and 12.3.3
list the changes of the successive approximation register and Vref during the A-D conversion, respectively.
Figure 12.3.1 shows the ideal A-D conversion characteristics in the 10-bit resolution mode.
Successive approximation register’s contents: n
0
VREF
1024
1 to 1023
× (n – 0.5)
Vref (V)
0
VREF: Reference voltage
Table 12.3.1 Relationship between successive approximation register’s contents and Vref



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