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TIR2000 Datasheet(PDF) 36 Page - Texas Instruments |
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TIR2000 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 63 page ![]() 3–6 3.9 Modem Status Register (MSR) - (read only) Address: 6 (Hex) Bit Definitions: BIT NO. DESCRIPTION 0 ∆ clear-to-send (CTS) indicator. 1 ∆ data-set-ready (DSR) indicator. 2 Trailing edge ring-indicator (RI) detector. 3 ∆ data-carrier-detect (DCD) indicator. 4 CTS. Complement of CTS. 5 DSR. Complement of DSR. 6 RI. Complement of RI. 7 DCD. Complement of DCD. 3.10 Scratch Register (SCR) - (read and write) Address: 7 (Hex) SIR/SHARP Mode Bit definitions: 7 6 5 4 3 2 1 0 SCR[7] SCR[6] SCR[5] SCR[4] SCR[3] SCR[2] SCR[1] SCR[0] 3.11 Baud-Rate Divisor Latch LSB (DLL) - (read and write) Address: 0 (Hex) - When LCR[7] = 1 Bit Definitions: 7 6 5 4 3 2 1 0 DLL[7] DLL[6] DLL[5] DLL[4] DLL[3] DLL[2] DLL[1] DLL[0] 3.12 Baud-Rate Divisor Latch MSB (DLM) - (write only) Address: 1 (Hex) - When LCR[7] = 1 Bit Definition: 7 6 5 4 3 2 1 0 DLM[7] DLM[6] DLM[5] DLM[4] DLM[3] DLM[2] DLM[1] DLM[0] |
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