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XRT86VL30 Datasheet(PDF) 34 Page - Exar Corporation |
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XRT86VL30 Datasheet(HTML) 34 Page - Exar Corporation |
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34 / 188 page ![]() XRT86VL30 29 SINGLE T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION REV. 1.0.0 2-0 RxSIGDL[2:0] R/W 000 Receive Signaling and Datalink Select[2:0]: These bits specify the destination for the data that is to be extracted via D/E channel, National Bits in timeslot 0 of the non-FAS frames, and Timeslot 16 in the outbound frames. The table below presents the settings of these three RxSIGDL bits in detail. TABLE 9: RECEIVE SIGNALING & DATA LINK SELECT REGISTER (RSDLSR) HEX ADDRESS: 0X010C BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION RXSIGDL [2:0] D/E CHANNEL NATIONAL BITS TIME SLOT 16 000 RxFrTD_n or the RxSer_n output pin Data Link RxSER_n output pin 001 RxFrTD_n or the RxSer_n output pin Data Link CAS signaling is enabled. Time Slot 16 can be extracted to any of the following: • RxSer_n output pin • RSAR Register (0x0500-0x051F) • RxOH_n output pin on time slot 16 only • RxSIG_n output pin on every time slot 010 RxFrTD_n or the RxSer_n output pin Data Link forced to All Ones Time Slot 16 can be extracted to any of the following: • RxSer_n output pin • RSAR Register (0x0500-0x051F) • RxOH_n output pin on time slot 16 only • RxSIG_n output pin on time slot 16 only 011 RxFrTD_n or the RxSer_n output pin Data Link forced to All Ones CAS signaling is enabled. Time Slot 16 can be extracted to any of the following: • RxSer_n output pin • RSAR Register (0x0500-0x051F) • RxOH_n output pin on time slot 16 only RxSIG_n output pin on every time slot 100 RxSIG_n or the RxSer_n output pin Data Link RxSER_n output pin 101/110/ 111 Not Used Not Used Not Used |
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