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XRT86VL30 Datasheet(PDF) 86 Page - Exar Corporation |
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XRT86VL30 Datasheet(HTML) 86 Page - Exar Corporation |
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86 / 188 page  XRT86VL30 81 SINGLE T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION REV. 1.0.0 BITS [7:4] - Reserved BITS [3:0] - Receive SSM Match 1 These bits can be used to set an expected value to be compared to the actual receive SSM message. This register is one of three possible expected values that can be set. Upon a match of this register, an independent alarm will be set. In addition, this register has a filter for consecutive message validation. BITS [7:4] - Reserved BITS [3:0] - Receive SSM Match 2 These bits can be used to set an expected value to be compared to the actual receive SSM message. This register is one of three possible expected values that can be set. Upon a match of this register, an independent alarm will be set. In addition, this register has a filter for consecutive message validation. BITS [7:4] - Reserved BITS [3:0] - Receive SSM Match 3 These bits can be used to set an expected value to be compared to the actual receive SSM message. This register is one of three possible expected values that can be set. Upon a match of this register, an independent alarm will be set. In addition, this register has a filter for consecutive message validation. TABLE 65: RECEIVE SSM MATCH 1 REGISTER (RSSMMR1 0X0172H) BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 Reserved RSSMM1[3:0] R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 TABLE 66: RECEIVE SSM MATCH 2 REGISTER (RSSMMR2 0X0173H) BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 Reserved RSSMM2[3:0] R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 TABLE 67: RECEIVE SSM MATCH 3 REGISTER (RSSMMR3 0X0174H) BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 Reserved RSSMM3[3:0] R/W R/W R/W R/W R/W R/W R/W R/W 0 0 0 0 0 0 0 0 |
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