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XRT86VL30 Datasheet(PDF) 52 Page - Exar Corporation |
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XRT86VL30 Datasheet(HTML) 52 Page - Exar Corporation |
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52 / 188 page  XRT86VL30 47 SINGLE T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION REV. 1.0.0 3 TxICLKINV R/W 0 Transmit Clock Inversion (Backplane Interface) This bit selects whether data transition will happen on the rising or fall- ing edge of the transmit clock. 0 = Selects data transition happen on the rising edge of the transmit clocks. 1 = Selects data transition happen on the falling edge of the transmit clocks. NOTE: This feature is only available for base rate configuration (i.e. non-highspeed, or non-multiplexed modes). 2 TxMUXEN R/W 0 Transmit Multiplexed Mode Enable This bit enables or disables the multiplexed mode on the transmit side. When multiplexed mode is enable, four-channel data from the back- plane interface are multiplexed onto one serial stream and output to the line side. The backplane speed will be running at 16.384MHz once mul- tiplexed mode is enabled. 0 = Disables the multiplexed mode. 1 = Enables the multiplexed mode. TABLE 27: TRANSMIT INTERFACE CONTROL REGISTER (TICR) HEX ADDRESS:0X0120 BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION |
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