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AD9122 Datasheet(PDF) 2 Page - Analog Devices

Part # AD9122
Description  Dual, 16-Bit, 1200 MSPS, TxDAC짰 Digital-to-Analog Converter
PDF  56 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9122 Datasheet(HTML) 2 Page - Analog Devices

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AD9122
Rev. 0 | Page 2 of 56
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications....................................................................................... 1
 
General Description ......................................................................... 1
 
Product Highlights ........................................................................... 1
 
Typical Signal Chain......................................................................... 1
 
Revision History ............................................................................... 2
 
Functional Block Diagram .............................................................. 3
 
Specifications..................................................................................... 4
 
DC Specifications ......................................................................... 4
 
Digital Specifications ................................................................... 5
 
Digital Input Data Timing Specifications ................................. 5
 
AC Specifications.......................................................................... 6
 
Absolute Maximum Ratings............................................................ 7
 
Thermal Resistance ...................................................................... 7
 
ESD Caution.................................................................................. 7
 
Pin Configuration and Function Descriptions............................. 8
 
Typical Performance Characteristics ........................................... 10
 
Terminology .................................................................................... 16
 
Theory of Operation ...................................................................... 17
 
Serial Port Operation ................................................................. 17
 
Data Format ................................................................................ 17
 
Serial Port Pin Descriptions...................................................... 17
 
Serial Port Options ..................................................................... 18
 
Device Configuration Register Map and Descriptions ......... 19
 
LVDS Input Data Ports .................................................................. 31
 
Word Interface Mode ................................................................. 31
 
Byte Interface Mode ................................................................... 31
 
Nibble Interface Mode ............................................................... 31
 
FIFO Operation .......................................................................... 31
 
Interface Timing ......................................................................... 33
 
Digital Datapath.............................................................................. 34
 
Premodulation ............................................................................ 34
 
Interpolation Filters ................................................................... 34
 
NCO Modulation ....................................................................... 37
 
Datapath Configuration ............................................................ 37
 
Determining Interpolation Filter Modes ................................ 38
 
Datapath Configuration Example ............................................ 39
 
Data Rates vs. Interpolation Modes......................................... 40
 
Coarse Modulation Mixing Sequences.................................... 40
 
Quadrature Phase Correction................................................... 41
 
DC Offset Correction ................................................................ 41
 
Inverse Sinc Filter ....................................................................... 41
 
DAC Input Clock Configurations ................................................ 42
 
DAC Input Clock Configurations............................................ 42
 
Analog Outputs............................................................................... 44
 
Transmit DAC Operation.......................................................... 44
 
Auxiliary DAC Operation ......................................................... 45
 
Baseband Filter Implementation .............................................. 46
 
Driving the ADL5375-15 .......................................................... 46
 
Reducing LO Leakage and Unwanted Sidebands .................. 47
 
Device Power Dissipation.............................................................. 48
 
Temperature Sensor ................................................................... 49
 
Multichip Synchronization............................................................ 50
 
Synchronization with Clock Multiplication ............................... 50
 
Synchronization with Direct Clocking.................................... 51
 
Data Rate Mode Synchronization ............................................ 51
 
FIFO Rate Mode Synchronization ........................................... 52
 
Additional Synchronization Features ...................................... 52
 
Interrupt Request Operation ........................................................ 54
 
Interrupt Service Routine.......................................................... 54
 
Interface Timing Validation.......................................................... 55
 
SED Operation............................................................................ 55
 
SED Example .............................................................................. 55
 
Outline Dimensions ....................................................................... 56
 
Ordering Guide .......................................................................... 56
 
REVISION HISTORY
9/09—Revision 0: Initial Version



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