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AD9122 Datasheet(PDF) 20 Page - Analog Devices |
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AD9122 Datasheet(HTML) 20 Page - Analog Devices |
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20 / 56 page  AD9122 Rev. 0 | Page 20 of 56 Reg Name Addr (Hex) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default Datapath Control 0x1B Bypass premod Bypass Sinc−1 Bypass NCO NCO gain Bypass phase comp and dc offset Select sideband Send I data to Q data 0xE4 HB1 Control 0x1C HB1[1:0] Bypass HB1 0x00 HB2 Control 0x1D HB2[5:0] Bypass HB2 0x00 HB3 Control 0x1E HB3[5:0] Bypass HB3 0x00 Chip ID 0x1F Chip ID[7:0] 0x08 FTW LSB 0x30 FTW[7:0] 0x00 FTW 0x31 FTW[15:8] 0x00 FTW 0x32 FTW[23:16] 0x00 FTW MSB 0x33 FTW[31:24] 0x08 NCO Phase Offset LSB 0x34 NCO Phase Offset[7:0] 0x00 NCO Phase Offset MSB 0x35 NCO Phase Offset[15:8] 0x00 NCO FTW Update 0x36 Frame FTW ack Frame FTW request Update FTW ack Update FTW request 0x00 I Phase Adj LSB 0x38 I Phase Adj[7:0] 0x00 I Phase Adj MSB 0x39 I Phase Adj[9:8] 0x00 Q Phase Adj LSB 0x3A Q Phase Adj[7:0] 0x00 Q Phase Adj MSB 0x3B Q Phase Adj[9:8] 0x00 I DAC Offset LSB 0x3C I DAC Offset[7:0] 0x00 I DAC Offset MSB 0x3D I DAC Offset[15:8] 0x00 Q DAC Offset LSB 0x3E Q DAC Offset[7:0] 0x00 Q DAC Offset MSB 0x3F Q DAC Offset[15:8] 0x00 I DAC FS Adj. 0x40 I DAC FS Adj[7:0] 0xF9 I DAC Control 0x41 I DAC sleep I DAC FS Adj[9:8] 0x01 Aux DAC I Data 0x42 I Aux DAC[7:0] 0x00 I Aux DAC Control 0x43 I Aux DAC sign I Aux DAC current direction I Aux DAC Sleep I Aux DAC[9:8] 0x00 Q DAC FS Adj. 0x44 Q DAC FS Adj[7:0] 0xF9 Q DAC Control 0x45 Q DAC sleep Q DAC FS Adj[9:8] 0x01 Aux DAC Q Data 0x46 Q Aux DAC[7:0] 0x00 Q Aux DAC Control 0x47 Q Aux DAC sign Q Aux DAC current direction Q Aux DAC Sleep Q Aux DAC[9:8] 0x00 Die Temp Range Control 0x48 FS Current[2:0] Ref Current[2:0] Capacitor value 0x02 Die Temp LSB 0x49 Die Temp[7:0] N/A Die Temp MSB 0x4A Die Temp[15:8] N/A SED Control 0x67 SED compare enable Sample error detected Autoclear enable Compare fail Compare pass 0x00 |
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