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LAN9303 Datasheet(PDF) 28 Page - SMSC Corporation |
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LAN9303 Datasheet(HTML) 28 Page - SMSC Corporation |
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28 / 366 page  Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII Datasheet Revision 1.3 (08-27-09) 28 SMSC LAN9303/LAN9303i DATASHEET 1 Port 0 MII Output Data 2 P0_OUTD2 O8 MII MAC Mode: This pin is the transmit data 2 bit from the switch to the external PHY. O8 MII PHY Mode: This pin is the receive data 2 bit from the switch to the external MAC. The output driver is disabled when the Isolate (VPHY_ISO) bit is set in the Virtual PHY Basic Control Register (VPHY_BASIC_CTRL). - RMII PHY Mode: This pin is not used Port 0 Mode[2] Configuration Strap P0_MODE2 IS (PU) Note 3.5 This strap configures the mode for Port 0. See Note 3.4. Please refer to the P0_MODE0 strap entry for mode encoding details. 1 Port 0 MII Output Data 1 P0_OUTD1 O8 MII MAC Mode: This pin is the transmit data 1 bit from the switch to the external PHY. O8 MII PHY Mode: This pin is the receive data 1 bit from the switch to the external MAC. The output driver is disabled when the Isolate (VPHY_ISO) bit is set in the Virtual PHY Basic Control Register (VPHY_BASIC_CTRL). O8 RMII PHY Mode: This pin is the receive data 1 bit from the switch to the external MAC. The output driver is disabled when the Isolate (VPHY_ISO) bit is set in the Virtual PHY Basic Control Register (VPHY_BASIC_CTRL). Port 0 Mode[1] Configuration Strap P0_MODE1 IS (PU) Note 3.5 This strap configures the mode for Port 0. See Note 3.4. Please refer to the P0_MODE0 strap entry for mode encoding details. Table 3.4 Port 0 MII/RMII Pins (continued) NUM PINS NAME SYMBOL BUFFER TYPE DESCRIPTION |
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