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LAN9303 Datasheet(PDF) 46 Page - SMSC Corporation

Part # LAN9303
Description  Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
PDF  366 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN9303 Datasheet(HTML) 46 Page - SMSC Corporation

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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
Revision 1.3 (08-27-09)
46
SMSC LAN9303/LAN9303i
DATASHEET
a load, an external pull-up or pull-down resistor should be used to augment the internal resistor to
ensure that it reaches the required voltage level prior to latching. The internal resistor can also be
overridden by the addition of an external resistor.
Note: The system designer must guarantee that configuration strap pins meet the timing
requirements specified in Section 14.5.2, "Reset and Configuration Strap Timing," on page 351.
If configuration strap pins are not at the correct voltage level prior to being latched, the device
may capture incorrect strap values.
4.2.4.1
Soft-Straps
Soft-strap values are latched on the release of POR or nRST and are overridden by values from the
EEPROM Loader (when an EEPROM is present). These straps are used as direct configuration values
or as defaults for CPU registers. Some, but not all, soft-straps have an associated pin. Those that do
not have an associated pin have a tie off default value. All soft-strap values can be overridden by the
EEPROM Loader. Table 4.2 provides a list of all soft-straps and their associated pin or default value.
Straps which have an associated pin are also fully defined in Chapter 3, "Pin Description and
Configuration," on page 23. Refer to Section 8.4, "EEPROM Loader," on page 113 for information on
the operation of the EEPROM Loader and the loading of strap values. The use of the term “configures”
in the “Description” section of Table 4.2 means the register bit is loaded with the strap value, while the
term “Affects” means the value of the register bit is determined by the strap value and some other
condition(s).
Upon setting the Digital Reset (DIGITAL_RST) bit in the Reset Control Register (RESET_CTL) or upon
issuing a RELOAD command via the EEPROM Command Register (E2P_CMD), these straps return
to their original latched (non-overridden) values if an EEPROM is no longer attached or has been
erased. The associated pins are not re-sampled. (i.e. The value latched on the pin during the last POR
or nRST will be used, not the value on the pin during the digital reset or RELOAD command issuance).
If it is desired to re-latch the current configuration strap pin values, a POR or nRST must be issued.



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