ATmega32U2 datasheet(95/314 Pages) ATMEL

95 / 314 page

7799B–AVR–07/09

ATmega8U2/16U2/32U2

generation. Similarly, do not write the TCNT0 value equal to BOTTOM when the counter is

down-counting.

The setup of the OC0x should be performed before setting the Data Direction Register for the

port pin to output. The easiest way of setting the OC0x value is to use the Force Output Com-

pare (FOC0x) strobe bits in Normal mode. The OC0x Registers keep their values even when

changing between Waveform Generation modes.

Be aware that the COM0x[1:0] bits are not double buffered together with the compare value.

Changing the COM0x[1:0] bits will take effect immediately.

15.6

Compare Match Output Unit

The Compare Output mode (COM0x[1:0]) bits have two functions. The Waveform Generator

uses the COM0x[1:0] bits for defining the Output Compare (OC0x) state at the next Compare

Match. Also, the COM0x[1:0] bits control the OC0x pin output source. Figure 15-4 shows a sim-

plified schematic of the logic affected by the COM0x[1:0] bit setting. The I/O Registers, I/O bits,

and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port Control Regis-

ters (DDR and PORT) that are affected by the COM0x[1:0] bits are shown. When referring to the

OC0x state, the reference is for the internal OC0x Register, not the OC0x pin. If a system reset

occur, the OC0x Register is reset to “0”.

Figure 15-4. Compare Match Output Unit, Schematic

The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform

Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-

put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction

ble on the pin. The port override function is independent of the Waveform Generation mode.

The design of the Output Compare pin logic allows initialization of the OC0x state before the out-

put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of

operation. See “Register Description” on page 102.

PORT

DDR

OCnx

Waveform

Generator

COMnx1

COMnx0

FOCn

clk

I/O

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