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33905 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

Part # 33905
Description  System Basis Chip Gen2 with High Speed CAN and LIN Interface
PDF  91 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33905 Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
21
33904/5
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
Characteristics noted under conditions 5.5 V
≤ VSUP ≤ 27 V, -40°C ≤ TA ≤ 125°C, GND = 0 V, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SPI TIMING
SPI operation frequency (MISO cap = 50 pF)
FREQ
0.25
-
4.0
MHz
SCLK Clock Period
tPCLK
250
-
N/A
ns
SCLK Clock High Time
tWSCLKH
125
-
N/A
ns
SCLK Clock Low Time
tWSCLKL
125
-
N/A
ns
Falling Edge of CS to Rising Edge of SCLK
tLEAD
30
-
N/A
ns
Falling Edge of SCLK to Rising Edge of CS
tLAG
30
-
N/A
ns
MOSI to Falling Edge of SCLK
tSISU
30
-
N/A
ns
Falling Edge of SCLK to MOSI
tSIH
30
-
N/A
ns
MISO Rise Time (CL = 50 pF)
tRSO
-
-
30
ns
MISO Fall Time (CL = 50 pF)
tFSO
-
-
30
ns
Time from Falling to MISO Low-impedance
Time from Rising to MISO High-impedance
tSOEN
tSODIS
-
-
-
-
30
30
ns
Time from Rising Edge of SCLK to MISO Data Valid
tVALID
-
-
30
ns
Delay between rising and falling edge on CS
D2CS
1.0
-
-
μs
CS low timeout detection
CS-TO
2.5
-
-
ms
SUPPLY, VOLTAGE REGULATOR, RESET
VSUP under-voltage detector threshold deglitcher
VS_LOW1/
2_DGLT
30
50
100
μs
Rise time at turn ON. VDD from 1.0 to 4.5 μV. 2.2 μF at VDD pin.
tRISE-ON
50
250
800
μs
Deglitcher time to set reset pin low
RST-DGLT
20
30
40
μs
RESET PULSE DURATION
VDD under-voltage (SPI selectable)
short, default at power on when BATFAIL bit set
medium
medium long
long
RST-PULSE
0.9
4.0
8.5
17
1.0
5.0
10
20
1.4
6
12
24
ms
Watchdog reset
RST-WD
0.9
1.0
1.4
ms
VSENSE INPUT
Under-voltage deglitcher time
BFT
30
-
100
μs
INTERRUPT
INT pulse duration (refer to SPI for selection. Guaranteed by design)
short
long
INT-PULSE
20
90
25
100
35
130
μs



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