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33905 Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc

Part # 33905
Description  System Basis Chip Gen2 with High Speed CAN and LIN Interface
PDF  91 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33905 Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
17
33904/5
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
UNDERVOLTAGE RESET AND RESET FUNCTION, RST PIN (CONTINUED)
Reset input threshold
Low threshold
High threshold
RST-VTH
1.5
2.5
1.9
3.0
2.2
3.5
V
Reset input hysteresis
HYST
0.5
1.0
1.5
V
I/O PINS WHEN FUNCTION SELECTED IS OUTPUT
I/O-0 high side switch drop @ I = -12 mA, VSUP = 10.5 V
I/O-0 HSDRP
-
0.5
1.4
V
I/O-2 and I/O-3 high side switch drop @ I = -20 mA, VSUP = 10.5 V
I/O-2-3 HSDRP
-
0.5
1.4
V
I/O-1, high side switch drop @ I = -400
μA, VSUP = 10.5 V
I/O-1 HSDRP
-
0.4
1.4
V
I/O-0, I/O-1 low side switch drop @ I = 400
μA, VSUP = 10.5 V
I/O-0-1 LSDRP
-
0.4
1.4
V
Leakage current
I/O-LEAK
-
0.1
3.0
μA
I/O PINS WHEN FUNCTION SELECTED IS INPUT
Negative threshold
I/O-NTH
1.4
2.0
2.9
V
Positive threshold
I/O-PTH
2.1
3.0
3.8
V
Hysteresis
I/O-HYST
0.2
1.0
1.4
V
Input current
I/O-IN
-5.0
1.0
5.0
μA
I/O-0 and I/O-1 input resistor. /O_0 (or I/O-1) selected in MUX register,
2.0 V < Vi/o_x <16 V (guaranteed by design).
RI/O-X
-
100
-
k
Ω
VSENSE INPUT
VSENSE under-voltage threshold (Not active in Low Power Modes)
- Low Threshold
- High threshold
- Hysteresis
VSENSE_TH
8.1
-
0.1
8.6
-
0.25
9.0
9.1
0.5
V
Input resistor to GND. In all modes except in Low Power modes.
(guaranteed by design).
VSENSE_R
-
125
-
k
Ω
ANALOG MUX OUTPUT
Output Voltage Range, with external resistor to GND >2.0 k
Ω
VOUT_MAX
0.0
-
VDD - 0.5
V
Internal pull-down resistor for regulator output current sense
RMI
0.8
1.9
2.8
k
Ω
External capacitor at MUX OUTPUT(15) (guaranteed by design)
CMUX
-
-
1.0
nF
Chip temperature sensor coeff (guaranteed by design and device
characterization)
TEMP-COEFF
20
21
22
mv/°C
Chip temperature: MUX-OUT voltage at TA = 25°C, guaranteed by
design and characterization.
VTEMP
1.5
1.65
1.8
V
Chip temperature: MUX-OUT voltage at TA = 125°C
VTEMP
3.6
3.75
3.9
V
Gain for VSENSE, with external 1.0 k 1% resistor
VSENSE GAIN
5.13
5.48
5.67
Offset for VSENSE, with external 1.0 k 1% resistor
VSENSE OFFSET
-20
-
20
mV
Divider ratio for VSUP1
VSUP1 RATIO
5.335
5.5
5.665
Divider ratio for I/O-0 and I/O-1 actual voltage
- with attenuation selected (MUX-OUT register bit 3 set to 1);
VSUP= 16V
VSUP= 27V
- with gain selected (MUX-OUT register bit 3 set to 0)
VI/O RATIO
3.8
3.75
-
4.0
3.95
2.0
4.2
4.15
-
Notes
15.
When C is higher than CMUX, a serial resistor must be inserted
Table 4. Static Electrical Characteristics (continued)
Characteristics noted under conditions 5.5 V
≤ VSUP ≤ 27 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values noted
reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit



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