33905 datasheet(73/91 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33904/5

SERIAL PERIPHERAL INTERFACE

DETAIL OF CONTROL BITS AND REGISTER MAPPING

Table 34. LIN 1 Register, LIN1

MOSI First byte [15-8]

[b_15 b_14] 10_010 [P/N]

MOSI Second Byte, bits 7-0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

01 10_ 011P

LIN mode[1]

LIN mode[0]

Slew rate[1]

Slew rate[0]

LIN T1 on

Vsup ext

Default state

Condition for default

POR

Bits

Description

b7 b6

LIN mode [1], LIN mode [0] - LIN 1 interface mode control, wake-up enable / disable

LIN1 disable, wake-up capability disable

not used

LIN1 disable, wake-up capability enable

LIN1 Transmit Receive mode

b5 b4

Slew rate[1], Slew rate[0] LIN 1 slew rate selection

Slew rate for 20kbit/s baud rate

Slew rate for 10kbit/s baud rate

Slew rate for fast baud rate

LIN T1 on

LIN 1 termination OFF

LIN 1 termination ON

Vsup ext

LIN goes recessive when device Vsup2 is below typ 6V. This is to meet J2602 specification

LIN continues operation below Vsup2 6V, until 5V-CAN is disabled.

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