PixArt Imaging Inc.

PAC107

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14

PixArt Imaging Inc.

V1.4, Aug, 2005

Low byte of Timer2 Capture

RCAP2L stores data to be loaded into or captured from the timer register TL2 for Timer2

High byte of Timer2 Capture

RCAP2H stores data to be loaded into or captured from the TH2 for Timer2

Interrupt Priority Control Register

IP.7: Reserved bits

PS1: Serial port 1 priority control bit. 1: high priority interrupt

PT2: Timer 2 interrupt priority control bit. 1:

PS0: Serial port0 priority control bit. 1: high priority interrupt

PT1: Timer 1 interrupt priority control bit.

PX1: External interrupt 1 priority control bit. 1: high priority interrupt

PT0: Timer 0 interrupt priority control bit.

PX0: External interrupt 0 priority control bit.1

Interrupt Enable Register.

RCAP2H

Address:CBh

bit 7

bit 0

RCAP2H.3

RCAP2H.6

RCAP2H.4

RCAP2H.7

RCAP2H.5

RCAP2H.1 RCAP2H.0

RCAP2H.2

RCAP2L

Address:CAh

bit 7

bit 0

RCAP2L.3

RCAP2L.6

RCAP2L.4

RCAP2L.7

RCAP2L.5

RCAP2L.1 RCAP2L.0

RCAP2L.2

IP

Address:B8h

bit 7

bit 0

PT1

PT0

PX0

PX1

PT2

PS

PS1

IE

Address:A8h

bit 7

bit 0

ET1

ET0

EX0

EX1

EA

ET2

ES

ES1