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HT56R67 Datasheet(PDF) 6 Page - Holtek Semiconductor Inc |
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HT56R67 Datasheet(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 104 page ![]() The following tables depict the device dependent pins. Pin Name I/O Configuration Option Description HT56R67 PC0~PC7 I/O ¾ Bidirectional 8-bit input/output port. Software instructions determine the CMOS output, Schmitt trigger input with or without pull-high resistor (de- termined by PCPU register control bit) VMAX I ¾ IC maximum voltage, connect to VDD,VLCD1 or V1 VLCD1/VLCD2/V1, C1, C2 ¾¾ LCD Voltage pump pins for C-type biasing. For R-type biasing only pin VLCD1 are used. SEG0~SEG9 SEG10/SDO SEG11/SDI/SDA SEG12/SCK/SCL SEG13/SCS SEG14/PCLK SEG15/PINT SEG16~SEG47 O O I/O I/O I/O O I/O O SIM PINT SEG0~SEG47 are LCD driver outputs for LCD panel segments. SEG10 is pin-shared with the SPI bus data output line, SDO. SEG11 is pin-shared with the SPI bus data input line, SDI and the I 2C Bus data line SDA. SEG12 is pin-shared with the SPI bus clock line, SCK and the I 2C Bus clock line SCL. SEG13 is pin-shared with the SPI bus select line, SCS. SEG14 is pin-shared with the Peripheral Clock line, PCLK. SEG15 is pin-shared with the Peripheral Interrupt line, PINT. The SEG0~SEG23 lines can be can be chosen to be either segment driv- ers or CMOS outputs using control bits in the LCD control registers. COM0~COM2 COM3/SEG48 O ¾ COM0~COM2 are the LCD common outputs. A bit in the LCD Control Register determines if pin COM3/SEG48 is configured as a segment driver or as a common output driver. HT56R668/HT56C668/HT56R678/HT56C678/HT56R688 VLCD I ¾ LCD bias pin - must less than or equal to VDD SEG0/SDO SEG1/SDI/SDA SEG2/SCK/SCL SEG3/SCS SEG4/PCLK SEG5/PINT SEG6~SEG63 COM15/SEG64~ COM8/SEG71 O I/O I/O I/O O I/O O O SIM PINT SEG0~SEG63 are LCD driver outputs for LCD panel segments. SEG0 is pin-shared with the SPI bus data output line, SDO. SEG1 is pin-shared with the SPI bus data input line, SDI and the I 2C Bus data line SDA. SEG2 is pin-shared with the SPI bus clock line, SCK and the I 2C Bus clock line SCL. SEG3 is pin-shared with the SPI bus select line, SCS. SEG4 is pin-shared with the Peripheral Clock line, PCLK. SEG5 is pin-shared with the Peripheral Interrupt line, PINT. The SEG0~SEG23 lines can be can be chosen to be either segment driv- ers or CMOS outputs using control bits in the LCD control registers. COM0~COM7 O ¾ COM0~COM7 are the LCD common outputs. Note: The Pin Description tables represents the largest package type available, therefore some of the pins and func- tions may not be available on smaller package types. Absolute Maximum Ratings Supply Voltage ...........................VSS -0.3V to VSS+6.0V Storage Temperature ............................ -50°Cto125°C Input Voltage..............................VSS -0.3V to VDD+0.3V Operating Temperature........................... -40°Cto85°C IOL Total ................................................................80mA IOH Total.............................................................. -80mA Total Power Dissipation .....................................500mW Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. HT56R67/HT56R668/HT56C668/HT56R678/HT56C678/HT56R688 Rev. 1.20 6 March 4, 2010 |
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