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MAC7200 Datasheet(PDF) 226 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 226 Page - Freescale Semiconductor, Inc |
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226 / 976 page ![]() A7S Nexus3 Programmers Model MAC7200 Microcontroller Family Reference Manual, Rev. 2 148 Freescale Semiconductor Table 11-18 and Table 11-19 illustrate examples of Direct Branch Messages: one with 2 MDO / 1 MSEO, and one with 8 MDO / 2 MSEO. Note that T0 and I0 are the least significant bits where: • Tx = TCODE number (fixed) • Sx = Source processor (fixed) • Ix = Number of Instructions (variable) 11.10 A7S Nexus3 Programmers Model This section describes the A7S Nexus3 programmers model. Nexus registers are accessed using the JTAG port in compliance with IEEE 1149.1 (discussed in Section 11.10.4, “Nexus Register Access via JTAG”). 11.10.1 JTAG ID Register This JTAG ID Register (located within the ARM7 CPU) provides key development attributes to the development tool concerning the ARM7 processor and the A7S Nexus3 block. This register is fixed for each ARM7 embedded system. This register is accessed through the standard JTAG IR/DR paths. Table 11-18. Direct Branch Message Example (2 MDO / 1 MSEO) Clock MDO[1:0] MSEO State 0 X X 1 Idle (or end of last message) 1 T1 T0 0 Start Message 2 T3 T2 0 Normal Transfer 3 T5 T4 0 Normal Transfer 4 S1 S0 0 Normal Transfer 5 S3 S2 0 Normal Transfer 6 I1 I0 1 End Packet 7 0 0 1 End Message 8 T1 T0 0 Start Message Table 11-19. Direct Branch Message Example (8 MDO / 2 MSEO) Clock MDO[7:0] MSEO[1:0] State 0 X X X X X X X X 1 1 Idle (or end of last message) 1 S1 S0 T5 T4 T3 T2 T1 T0 0 0 Start Message 2 0 0 0 0 I1 I0 S3 S2 1 1 End Packet/End Message 3 S1 S0 T5 T4 T3 T2 T1 T0 0 0 Start Message |
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