MAC7200 datasheet(297/976 Pages) FREESCALE

297 / 976 page

The SPP DMA Controller Module (SPP_DMA2)

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

219

12.2.4.1.12

DMA Clear DONE Status (DMACDNE)

The DMACDNE register provides a simple memory-mapped mechanism to clear the DONE bit in the

TCD of the given channel. The data value on a register write causes the DONE bit in the corresponding

Transfer Control Descriptor to be cleared. A data value of 64 to 127 (regardless of the number of

implemented channels) provides a global clear function, forcing all DONE bits to be cleared. Reads of this

76543210

00000000

SSRT[6:0]

Reset

0000000

= Unimplemented

Figure 12-12. DMA Set START Bit (DMASSRT) Register

Table 12-15. DMASSRT Field Descriptions

Field

Descriptions

Reserved, should be cleared.

6–0

SSRT[6:0]

Set START Bit (Channel Service Request).

0-63

Set the corresponding channel’s TCD.start

64-127 Set all TCD.start bits

76543210

00000000

CDNE[6:0]

Reset

0000000

= Unimplemented

Figure 12-13. DMA Clear DONE Status (DMACDNE) Register

Table 12-16. DMACDNE Field Descriptions

Field

Description

Reserved, should be cleared.

6–0

CDNE[6:0]

Clear DONE Status Bit.

0-63

Clear the corresponding channel’s DONE bit 64-127 Clear all TCD DONE bits

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