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MAC7200 Datasheet(PDF) 928 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 928 Page - Freescale Semiconductor, Inc |
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928 / 976 page ![]() Initialization/Application Information MAC7200 Microcontroller Family Reference Manual, Rev. 2 850 Freescale Semiconductor 3. Configure DMA triggers in the Periodic Interrupt Timer 4. In the DMA Channel Mux, configure one of the available DMA channels to be sourced from an "always enabled" source Example 34-5. Drive Ports G0 - G2 every 3 μs with data from memory for 129μs 1. Ensure that ESCI_A and ESCI_B are disabled 2. Configure Ports G0,G1 and G2 as outputs (CONFIGxx=0x0040) 3. Configure the DMA to copy 3-byte tables from memory. This can be done by using a minor loop count of 3 and a major loop count equal to the number of tables of data to be driven. Data is to be driven for 129 μs, with a 3μs delay between each table, so 44 tables of data are required. Therefore our major counter will be 44. 4. Configure the Periodic Interrupt Timer to set a period of 3 μs 5. Configure the DMA Channel Mux to connect an open "always enabled" source and to enable the DMA trigger functionality for that channel. 34.8.2.3 Using Interrupts To use a pin as an external interrupt, follow these steps: 1. Determine which peripheral(s) will not be used. The corresponding pins of the selected peripheral(s) may be used as external interrupts. Although it is possible to dynamically switch between Peripheral and GPIO Modes, there is a 2 cycle latency that must be accounted for, and it is generally recommended that switching is done only during initialization of the part (i.e.-statically). 2. If required, disable the peripheral. See the documentation for the particular peripheral for more information on how to do this. 3. Using Table 34-6, determine the Port number(s) for the desired peripheral pin(s). Note that, in most cases, all pins associated with a peripheral should be switched to GPIO Mode to avoid any possible spurious inputs to the peripheral. 4. Using Table 34-11, determine the correct CONFIG register(s) for the selected port number(s). 5. Determine the proper configuration for the pin(s) — Clear the MODE bit (Pin is in GPIO mode) — Clear the DDR bit (Pin is an input) — Set the PIER bit (Interrupt is not masked) if you want the processor to be interrupted — Interrupt polarity (See Table 34-12, Table 34-14 and Table 34-51) 6. Write the proper configuration to the selected CONFIG register(s). Note that, in GPIO Mode, all unreserved bits in the CONFIG register are used, and should be properly configured. 7. Once an interrupt occurs on any pin enabled as an interrupt, the processor will receive an interrupt (if the PIER bit was set for that particular pin). The Interrupt Service Routine (ISR) should determine the exact source of the interrupt as follows: |
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