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MAC7200 Datasheet(PDF) 143 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 143 Page - Freescale Semiconductor, Inc |
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143 / 976 page ![]() Clock Generation MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 65 Figure 5-5. ALC PLL Mode Clock Path 5.2.1.3 External Clock 1:1 Mode In this mode, the system clock is fed from an external 3.3V clock, and the PLL is bypassed. Refer to Figure 5-6. XCLKS = 0 PLLSEL = 0 (PLL is bypassed) Eqn. 5-5 Eqn. 5-6 OSC EXTAL OSCCLK 0 1 XTAL PLL PLLSEL PLLCLK System Clock CRG ÷2 Peripheral Bus Clock SystemClock OSCCLOCK = PeripheralBusClock SystemClock 2 ----------------------------------- OSCCLK 2 ------------------------- == |
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