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MAC7200 Datasheet(PDF) 177 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 177 Page - Freescale Semiconductor, Inc |
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177 / 976 page  Debug Application Usage MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 99 Figure 8-10. Monitor Mode Overview 8.8.2 Entering Debug mode • The ARM7 core is forced into a debug state Table 8-3. ARM7TDMI-S Debug State Overview Debug State Monitor Mode Processor External bus indicates “internal cycles” Processor executes normally Interrupts Disabled Enabled Aborts Disabled Enabled. Instruction/Data Abort also triggered by Breakpoint/Watchpoint, respectively. JTAG Interface Active Can insert instructions into the ARM instruction pipeline to examine registers and system state Active Can communicate with a software monitor executing on the core Monitor Mode DCR[4]=1 Breakpoint Watchpoint DBGBREAK=1 DBGRQ=1 Instruction Abort Exception Instruction Fetch Operand Fetch Data Abort Exception No Action |
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