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6402 Datasheet(PDF) 173 Page - Intel Corporation

Part # 6402
Description  Advanced Memory Buffer
PDF  250 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

6402 Datasheet(HTML) 173 Page - Intel Corporation

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Intel® 6400/6402 Advanced Memory Buffer Datasheet
173
Registers
14.3.1.7
FBDLIS: FBD Link Initialization Status
This register reports FBD initialization status and is only valid when the link is up since
it is not sticky.
10
RO
0
VARLAT: Variable Read Latency Mode
• 1 = Support Variable Read Latency on data returns
• 0 = Not supported
9RO
1
LAI: Logic Analyzer Interface Mode
• 1 = Support remapping DDR interface as Logic Analyzer Interface
• 0 = Not supported
8RO
0
DMASK: Data Mask for non-ECC Write Data
• 1 = Support data mask with non-ECC Write
• 0 = Not supported
7RO
0
L0S: Low Power Link State
• 1 = Support L0s state
• 0 = Not supported
6:2
RO
1Eh
NBWC: Northbound Width Capability
• 1XXXX = 14 bits NB width supported
• X1XXX = 14bits fail over to 13 bits mode supported.
• XX1XX = 13 bits NB width supported
• XXX1X = 13 bits fail over to 12 bits mode supported.
1:0
RO
01
SBWC: Southbound Width Capability
• X1 = 10 SB bits: Device supports 10-bits and 10-bit fail-over to 9-bits.
Both configurations deliver 72-bits of data payload frame.
•1X = Reserved
Device:
NodeID
Function: 1
Offset:
60h
Bit
Attr
Default
Description
Device:
NodeID
Function: 1
Offset:
64h
Bit
Attr
Default
Description
31:20
RV
0
Reserved
19
RO
0
DATAMERGEERROR: NorthBound Data Merge Error
•1 = NB merge error
18
ROST
0
NBMERGEDIS: NorthBound Merge Disable
Set by TS2 packet addressed to it
•1 = Disable NB merge
• Note: state in AMB should be sticky through fast link reset until new TS2
resets bit or hard pin reset
17:12
RO
3Fh
NBWCFG: Northbound width configuration set by TS3
•See table in FBD Architecture & Protocol Specification for full decoding
• [5:4] = Selects 14, 13 or 12 lane operation.
= Protocol Selection[1:0] out TS3 Protocol Selection[3:0]
• [3:0] - Selects none or one lane to map out
= NB Channel Configuration [3:0] in TS3
11:8
RO
Fh
SBWCFG: Southbound width capability set by TS3
•See Table in FBD Architecture & Protocol Specification for full decoding
• [3:0] - Selects none or one lane to map out
7RV
0
Reserved



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