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6402 Datasheet(PDF) 175 Page - Intel Corporation |
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6402 Datasheet(HTML) 175 Page - Intel Corporation |
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175 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 175 Registers 14.3.1.8 FBDSBCFGNXT: FBD SB Link Electrical Configuration This register contains next settings of control bits to set link electrical parameters to match link length and frequency characteristics. 14.3.1.9 FBDNBCFGNXT: FBD NB Link Electrical Configuration This register contains next settings of control bits to set link electrical parameters to match link length and frequency characteristics. Device: NodeID Function: 1 Offset: 54h Bit Attr Default Description 7:5 RV 0h Reserved 4:3 RWST 00 SBTXDRVCUR: ‘11’ = Small ‘10’ = reserved ‘01’ = Regular ‘00’ = Large 2:1 RWST 10b SBTXDEEMP: 00 = 0 dB 01 = 3.5dB 10 = 6dB 11 = 9.5dB 0RWST 1b SBRESYNCEN: ‘1’ = SB pass-thru data is in Re-sync mode ‘0’ = SB pass-thru is in Re-sample mode. Device: NodeID Function: 1 Offset: 55h Bit Attr Default Description 7:5 RV 0h Reserved 4:3 RWST 00 NBTXDRVCUR: ‘11’ = Small ‘10’ = reserved ‘01’ = Regular ‘00’ = Large 2:1 RWST 10b NBTXDEEMP: 00 = 0 dB 01 = 3.5dB 10 = 6dB 11 = 9.5dB 0RWST 1b NBRESYNCEN: ‘1’ = SB pass-thru data is in Re-sync mode ‘0’ = SB pass-thru is in Re-sample mode. |
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