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6402 Datasheet(PDF) 212 Page - Intel Corporation |
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6402 Datasheet(HTML) 212 Page - Intel Corporation |
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212 / 250 page ![]() Registers 212 Intel® 6400/6402 Advanced Memory Buffer Datasheet 14.6.1.9 DQSFAIL0: DQS Failure Configuration Register 0 14.6.1.10 DRRTC: Receive Enable Reference Output Timing Control Registers Note: These registers have to be saved and restored on S3. Device: NodeID Function: 4 Offset: A0h Bit Attr Default Description 31 RWST 0 r1dqs15: rank 1 30 RWST 0 r1dqs06: rank 1 29 RWST 0 r1dqs14: rank 1 28 RWST 0 r1dqs05: rank 1 27 RWST 0 r1dqs13: rank 1 26 RWST 0 r1dqs04: rank 1 25 RWST 0 r1dqs12: rank 1 24 RWST 0 r1dqs03: rank 1 23 RWST 0 r1dqs11: rank 1 22 RWST 0 r1dqs02: rank 1 21 RWST 0 r1dqs10: rank 1 20 RWST 0 r1dqs01: rank 1 19 RWST 0 r1dqs09: rank 1 18 RWST 0 r1dqs00: rank 1 17 RWST 0 r0dqs17: rank 0 16 RWST 0 r0dqs08: rank 0 15 RWST 0 r0dqs16: rank 0 14 RWST 0 r0dqs07: rank 0 13 RWST 0 r0dqs15: rank 0 12 RWST 0 r0dqs06: rank 0 11 RWST 0 r0dqs14: rank 0 10 RWST 0 r0dqs05: rank 0 9RWST 0 r0dqs13: rank 0 8RWST 0 r0dqs04: rank 0 7RWST 0 r0dqs12: rank 0 6RWST 0 r0dqs03: rank 0 5RWST 0 r0dqs11: rank 0 4RWST 0 r0dqs02: rank 0 3RWST 0 r0dqs10: rank 0 2RWST 0 r0dqs01: rank 0 1RWST 0 r0dqs09: rank 0 0RWST 0 r0dqs00: rank 0 |
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