6402 datasheet(224/250 Pages) INTEL

224 / 250 page

Registers

224

Intel® 6400/6402 Advanced Memory Buffer Datasheet

Match and Mask bit numbering of SB frames is as follows:

• where N= 0 for slot A, 4 for slot B and 8 for slot C

14.7.2.3

SBMATCHL0: Lower Southbound Match Register 0

This register sets the lower 32 bits of data match for match southbound command 0.

14.7.2.4

SBMATCHL1: Lower Southbound Match Register 1

This register sets the lower 32 bits of data match for match southbound command 1.

15:8

RWST

00h

CMD1:

Upper 8 bits [39:32] of southbound command 1

7:0

RWST

00h

CMD0:

Upper 8 bits [39:32] of southbound command 0

Device:

NodeID

Function: 5

Offset:

BCh

Bit

Attr

Default

Description

Table 14-17. Bit Locations for SB Match and Mask

Xfr\lane

987

65432

0 + N

B36B32

B28B24

B20B16

B12B8

1 + N

B37B33

B29B25

B21B17

B13B9

2 + N

B38B34

B30B26

B22B18

B14B10

3 + N

B39B35

B31B27

B23B19

B15B11

Device:

NodeID

Function: 5

Offset:

C0h

Bit

Attr

Default

Description

31:0

RWST

00004000h

CMD:

Lower 32bits [31:0] of southbound command

power on default = match Synch

Device:

NodeID

Function: 5

Offset:

C4h

Bit

Attr

Default

Description

31:0

RWST

00100000h

CMD:

Lower 32bits [31:0] of southbound command

power on default = match Activate

6402 Datasheet(PDF) 224 Page - Intel Corporation

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