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6402 Datasheet(PDF) 239 Page - Intel Corporation |
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6402 Datasheet(HTML) 239 Page - Intel Corporation |
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239 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 239 Registers 14.8.3.6 NBFIBTXSHFT: NB Intel IBIST Transmitter Inversion Shift Register Each bit in this register enables inverting the patterns that is driven on corresponding lanes. If AUTOINVSWPEN bit is set in port control register, the TXINVSHFT field is rotated left at the completion of each pattern buffer set. 14.8.3.7 NBFIBRXSHFT: NB Intel IBIST Receiver Inversion Shift Register Each bit in this register enables inverting the patterns that is received on corresponding lanes. If AUTOINVSWPEN bit is set in port control register, the RXINVSHFT field is rotated left at the completion of each pattern buffer set. 14.8.3.8 NBFIBRXLNERR: NB Intel IBIST Receiver Lane Error Status This records the error status from each lane. 14.8.3.9 NBFIBPATTBUF2: NB Intel IBIST Pattern Buffer 2 Register This optional register contains the pattern bits used in Intel IBIST operations. Only the least significant 24 bits are used. This user specified pattern goes out on to the link with the least-significant 12 bits as the first frame and the most significant 12 bits as the second frame. Device: NodeID Function: 6 Offset: D4h Bit Attr Default Description 31:14 RV 00000h Reserved 13:0 RWST 3FFFh TXINVSHFT: Transmitter Inversion Shift Register. Device: NodeID Function: 6 Offset: D8h Bit Attr Default Description 31:14 RV 00000h Reserved 13:0 RWST 3FFFh RXINVSHFT: Receiver Inversion Shift Register. Device: NodeID Function: 6 Offset: DCh Bit Attr Default Description 31:14 RV 00000h Reserved 13:0 ROST 0000h RXERRSTAT: Receiver Error Status Device: NodeID Function: 6 Offset: E0h Bit Attr Default Description 31:24 RV 00h Reserved 23:0 RWST fd3302h IBPATBUF2: IBIST Pattern Buffer 2 Pattern buffer storing the default and the user programmable pattern. |
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