Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

6402 Datasheet(PDF) 240 Page - Intel Corporation

Part # 6402
Description  Advanced Memory Buffer
PDF  250 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

6402 Datasheet(HTML) 240 Page - Intel Corporation

Back Button 6402 Datasheet HTML 236Page - Intel Corporation 6402 Datasheet HTML 237Page - Intel Corporation 6402 Datasheet HTML 238Page - Intel Corporation 6402 Datasheet HTML 239Page - Intel Corporation 6402 Datasheet HTML 240Page - Intel Corporation 6402 Datasheet HTML 241Page - Intel Corporation 6402 Datasheet HTML 242Page - Intel Corporation 6402 Datasheet HTML 243Page - Intel Corporation 6402 Datasheet HTML 244Page - Intel Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 240 / 250 page
background image
Registers
240
Intel® 6400/6402 Advanced Memory Buffer Datasheet
14.8.3.10 NBFIBPATT2EN: NB Intel IBIST Pattern Buffer 2 Enable
This optional register specifies which lanes will carry the pattern specified in
NBFIBPATTBUFF2.
14.8.3.11 NBFIBINIT: NB Intel IBIST Initialization Register
This register control northbound Intel IBIST Testing.
14.8.3.12 NBIBISTMISC: NB Intel IBIST Initialization Miscellaneous Register
This register control northbound Intel IBIST Testing.
Device:
NodeID
Function: 6
Offset:
E4h
Bit
Attr
Default
Description
15:14
RV
00
Reserved
13:0
RWST
0000h
IBPATBUF2EN: IBIST Pattern Buffer 2 enable
Per lane enable for driving pattern buffer 2.
Device:
NodeID
Function: 6
Offset:
F0h
Bit
Attr
Default
Description
31
RWST
0
SBIDLE: SB Link is not active
This is to enable the NB link to complete training when there is no activity on
the SB side. Normally NB waits for SB init to complete before proceeding with
its training.
0 - Wait for SB
1 - Do not wait for SB
30:21
RWST
0c8h
NBTS0CNT: Northbound TS0 Count
Number of TS0 sequences to transmit.
20:13
RWST
01h
NBTS1CNT: Northbound TS1 Count
Number of TS1 sequences to transmit.
If TS1CNT[7] = 1; (TS1CNT >= 128) Intel IBIST will loop forever
If TS1CNT[7] = 0; (TS1CNT <128) Intel IBIST will loop TS1CNT times
12:3
RWST
100h
NBDISCNT: Northbound Disable State Count
Number of cycles to remain in disable state.
2RWST
1
NBCALIBEN: Northbound Calibrating Enable
1 - Perform FBD Calibration.
1RV
0
Reserved
0RWST
0
NBIBISTINITEN: IBIST Initialization Enable
1 - Start IBIST Testing with Northbound Transmitter as the host.
Device:
NodeID
Function: 6
Offset:
F4h
Bit
Attr
Default
Description
31
RV
00h
Reserved
23:20
RWST
0h
AMBID: Value of the AMB ID field during TS0
19:0
RWST
61a80h
NBIBISTCALPERIOD: Number of cycles to drive 1 during Calibration



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com