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6402 Datasheet(PDF) 238 Page - Intel Corporation |
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6402 Datasheet(HTML) 238 Page - Intel Corporation |
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238 / 250 page ![]() Registers 238 Intel® 6400/6402 Advanced Memory Buffer Datasheet 14.8.3.3 NBFIBPATTBUF1: NB Intel IBIST Pattern Buffer 1 Register This register contains the pattern bits used in Intel IBIST operations. Only the least significant 24 bits are used. This user specified pattern goes out on to the link with the least-significant 12 bits as the first frame and the most significant 12 bits as the second frame. 14.8.3.4 NBFIBTXMSK: NB Intel IBIST Transmitter Mask Register This register enables Intel IBIST operations for individual lanes. This mask only applies to transmitters and not receivers. 14.8.3.5 NBFIBRXMSK: NB Intel IBIST Receiver Mask Register This register enables Intel IBIST operations for individual lanes. This mask only applies to receivers and not transmitters. 2:0 RWST 000 PTGENORD: Pattern Generation Order 000: Pattern Store + Modulo N Cntr + Constant Generator 001: Pattern Store + Constant Generator + Modulo N Cntr 010: Modulo N Cntr + Pattern Store + Constant Generator 011: Modulo N Cntr + Constant Generator + Pattern Store 100: Constant Generator + Pattern Store + Modulo N Cntr 101: Constant Generator + Modulo N Cntr + Pattern Store 110: Reserved 111: Reserved Device: NodeID Function: 6 Offset: C4h Bit Attr Default Description Device: NodeID Function: 6 Offset: C8h Bit Attr Default Description 31:24 RV 00h Reserved 23:0 RWST 02ccfdh IBPATBUF: IBIST Pattern Buffer Pattern buffer storing the default and the user programmable pattern. Device: NodeID Function: 6 Offset: CCh Bit Attr Default Description 31:14 RV 00000h Reserved 13:0 RWST 3FFFh TXMASK: Selects which channels to enable for testing. Device: NodeID Function: 6 Offset: D0h Bit Attr Default Description 31:14 RV 00000h Reserved 13:0 RWST 3FFFh RXMASK: Selects which channels to enable for testing. |
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