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6402 Datasheet(PDF) 236 Page - Intel Corporation

Part # 6402
Description  Advanced Memory Buffer
PDF  250 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

6402 Datasheet(HTML) 236 Page - Intel Corporation

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Registers
236
Intel® 6400/6402 Advanced Memory Buffer Datasheet
14.8.2.12 SBIBISTMISC: SB Intel IBIST Initialization Miscellaneous Register
This register control southbound Intel IBIST Testing.
14.8.3
Northbound FBD Intel IBIST Registers
14.8.3.1
NBFIBPORTCTL: Northbound FBD Intel IBIST Port Control Register
This register controls the operation of the Intel IBIST logic.
Device:
NodeID
Function: 6
Offset:
B4h
Bit
Attr
Default
Description
31:
RV
00h
Reserved
23:20
RWST
0h
AMBID: Value of the AMB ID field during TS0
19:0
RWST
61a80h
SBIBISTCALPERIOD: Number of cycles to drive 1 during
Calibration
Device:
NodeID
Function: 6
Offset:
C0h
Bit
Attr
Default
Description
31:24
RV
00h
Reserved
23
RWST
0
SBNBMAP: Loopback mapping bit
This bit will be sent during TS1 to specify to the slave which lanes needs to be
looped back. Actual lanes looped back is specified in the FBD Architecture Spec.
22
RWST
0
CMMSTR: Compliance Measurement Mode start
This puts the Intel IBIST logic in CMM mode and Intel IBIST TX engine will start
transmitting Intel IBIST patterns.
21:12
RWCST
000h
ERRCNT: Error Counter
Total number of frames with errors that were encountered by this port.
11:8
ROST
0h
ERRLNNUM: Error Lane Number
This points to the first lane that encountered an error. If more than one lane
reports an error in a cycle, the most significant lane number that reported the
error will be logged.
7:6
RWCST
00
ERRSTAT: Port Error Status
When Intel IBIST is started, status goes to 01 until first start delimiter is
received and then goes to 00 until the end or to10 if an error occurs.
00: No error.
01: Did not receive first start delimiter.
10: Transmission error (first error).
11: Reserved
5RWST
0
AUTOINVSWPEN: Auto Inversion sweep enable
This bit enables the inversion shift register to continuously rotate the pattern in
the FIBTXSHFT and FIBRXSHFT registers.
0: Disable Auto-inversion
1: Enable Auto-inversions
4RWST
0
STOPONERR: Stop IBIST on Error
0: Do not stop on error, only update error counter
1: Stop on error
3RWST
0
LOOPCON: Loop forever
0: No looping
1: Loop forever



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