6402 datasheet(233/250 Pages) INTEL

233 / 250 page

Intel® 6400/6402 Advanced Memory Buffer Datasheet

233

Registers

14.8.2.3

SBFIBPATTBUF1: SB Intel IBIST Pattern Buffer 1 Register

This register contains the pattern bits used in Intel IBIST operations. Only the least

significant 24 bits are used. This user specified pattern goes out on to the link with the

least-significant 12 bits as the first frame and the most significant 12 bits as the

second frame.

14.8.2.4

SBFIBTXMSK: SB Intel IBIST Transmitter Mask Register

This register enables Intel IBIST operations for individual lanes. This mask only applies

to transmitters and not receivers.

12:10

RWST

001b

MODPERIOD: Period of the Modulo-N counter

Each encoding transmits a 24-bit pattern as specified below. All other encodings are

reserved.

001: L/2 - 0101_0101_0101_0101_0101_0101

010: L/4 - 0011_0011_0011_0011_0011_0011

011: L/6 - 0001_1100_0111_0001_1100_0111

100: L/8 - 0000_1111_0000_1111_0000_1111

110: L/24 - 0000_0000_0000_1111_1111_1111

9:3

RWST

0Fh

PATTLOOPCNT: Pattern Buffer Loop Counter

00h: Disable Pattern Output

01h: 7Fh The number of times the Pattern Buffer (FIBPATTBUF1) should be

repeated before going to the next component.

2:0

RWST

000

PTGENORD: Pattern Generation Order

000: Pattern Store + Modulo N Cntr + Constant Generator

001: Pattern Store + Constant Generator + Modulo N Cntr

010: Modulo N Cntr + Pattern Store + Constant Generator

011: Modulo N Cntr + Constant Generator + Pattern Store

100: Constant Generator + Pattern Store + Modulo N Cntr

101: Constant Generator + Modulo N Cntr + Pattern Store

110: Reserved

111: Reserved

Device:

NodeID

Function: 6

Offset:

84h

Bit

Attr

Default

Description

Device:

NodeID

Function: 6

Offset:

88h

Bit

Attr

Default

Description

31:24

00h

Reserved

23:0

RWST

02ccfdh

IBPATBUF: IBIST Pattern Buffer

Pattern buffer storing the default and the user programmable

pattern.

Default: 02ccfdh

Device:

NodeID

Function: 6

Offset:

8Ch

Bit

Attr

Default

Description

31:10

000000h

Reserved

9:0

RWST

3FFh

TXMASK: Selects which channels to enable for testing.

6402 Datasheet(PDF) 233 Page - Intel Corporation

6402 Datasheet(HTML) 233 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL