TLE5011 datasheet(30/45 Pages) INFINEON

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TLE5011

Specification

Final Data Sheet

V2.0, 2011-03

Reserved Registers (08

H to 0BH)

The values in these registers are 8-bit unsigned integer values.

The values in addr.8 and addr.9 have to be in reset status.

FSYNC_INV

Addr: 06

Reset Value: 00

FILT_INV

FSYNC

Field

Bits

Type

Description

FILT_INV

Filter Input Inversion (to check the digital data path during operation)

0: Filter Inputs are not inverted

1: Filter Inputs are inverted

FSYNC

6-0

Frame Synchronization (7-bit unsigned integer value)

The Filter Update time of approx. 80 µs results from the filter

decimation. The phase of this decimation can be set and checked by

this counter.

If FIR_BYP is activated, this counter overflows at the value 31

ANGT

Addr: 07

Reset Value: 00

reserved

ANGT_EN

ANGT_Y

ANGT_X

-W

Field

Bits

Type

Description

reserved

Reserved, must be set to 0

ANGT_EN

Angle Test Enable

0: Angle Test disable command

1: Angle Test enable command

in this case X and Y values represent resistive test values that can be

used to simulate angle values

ANGT_Y

5-3

Angle Test X and Y value

See : Table 18 “Functional Angle Test” on Page 37

ANGT_X

2-0

Reserved

Addr: 08

Reset Value: FF

Reserved

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