REV. 0

AD7719

–22–

Operating Characteristics when Addressing the Mode and Control Registers

1. Any change to the MD bits will immediately reset both ADCs. A write to the MD2–0 bits with no change is also treated as a reset.

(See exception to this in Note 3.)

2. If AD0CON is written when AD0EN = 1, or if AD0EN is changed from 0 to 1, both ADCs are also immediately reset. In other

words, the Main ADC is given priority over the Aux ADC and any change requested on main is immediately responded to.

3. On the other hand, if AD1CON is written to only the Aux ADC is reset. For example, if the Main ADC is continuously convert-

ing when the Aux ADC change or enable occurs, the Main ADC continues undisturbed. Rather than allow the Aux ADC

to operate with a phase difference from the Main ADC, the Aux ADC will fall into step with the outputs of the Main ADC.

The result is that the first conversion time for the Aux channel will be delayed up to three outputs while the Aux ADC update rate

is synchronized to the Main ADC.

4. Once the MODE has been written with a calibration mode, the RDY0/1 bits (STATUS) are immediately reset and the calibration

commences. On completion the appropriate calibration registers are written, the relevant bits in STATUS are written, and

the MD2–0 bits are reset to 001 to indicate the ADC is back in Idle Mode.

5. Any calibration request of the Aux ADC while the temperature sensor is selected will fail to complete.

6. Calibrations are performed with the maximum allowable SF value. SF register is reset to user configuration after calibration.

Main ADC Control Register (AD0CON): (A3, A2, A1, A0 = 0, 0, 1, 0; Power-On Reset = 07 Hex)

The Main ADC control Register is an 8-bit register from which data can be read or to which data can be written. This register is used

to configure the Main ADC for range, channel selection, 16-/24-bit operation and unipolar or bipolar coding. Table XIII outlines the bit

designations for the Main ADC control register. AD0CON7 through AD0CON0 indicate the bit location, AD0CON denoting the

bits are in the Main ADC Control Register. AD0CON7 denotes the first bit of the data stream. The number in brackets indicates the

power-on/reset default status of that bit.

Table XIII. Main ADC Control Register (AD0CON) Bit Designations

Bit

Bit

Location

Name

Description

AD0CON7

AD0EN

Main ADC Enable Bit.

Set by user to enable the Main ADC. When set the Main ADC operates according to the MD

bits in the mode register.

Cleared by the user to power down the Main ADC.

AD0CON6

WL

16-/24-Bit Operating Mode.

Set by user to enable 16-bit mode. The conversion results from the Main ADC will be rounded

to 16 bits and the Main ADC data register will be 16 bits wide.

Cleared by user to enable 24-bit mode. The conversion results from the Main ADC will be

rounded to 24 bits and the Main ADC data register will be 24 bits wide.

AD0CON5

CH1

Main ADC Channel Selection Bits.

AD0CON4

CH0

Written by the user to select the differential input pairs used by the Main ADC as follows:

Note: The CHCON bit resides in the MODE register.

CHCON

CH1

CH0

Positive Input

Negative Input

Calibration Register Pair

0

0

0

AIN1

AIN2

0

0

0

1

AIN3

AIN4

1

0

1

0

AIN2

AIN2

0

0

1

1

AIN3

AIN2

1

1

0

0

AIN1

AIN4

0

1

0

1

AIN3

AIN4

1

1

1

0

AIN4

AIN4

0

1

1

1

AIN2

AIN4

2

AD0CON7

AD0CON6

AD0CON5

AD0CON4

AD0CON3

AD0CON2

AD0CON1

AD0CON0

AD0EN (0)

WL (0)

CH1 (0)

CH0 (0)

U/B (0)

RN2 (1)

RN1 (1)

RN0 (1)