REV. 0

AD7719

–24–

Table XIV (continued)

AD1CON3

U/

B

Aux ADC Unipolar/Bipolar Selection Bit.

Set by user to enable unipolar coding i.e., Zero differential input will result in 0000 Hex output.

Cleared by user to enable bipolar coding, Zero differential input will result in 8000 Hex output.

AD1CON2

0

Must be zero for specified operation.

AD1CON1

0

Must be zero for specified operation.

AD1CON0

ARN

Auxiliary Channel Input Range Bit.

When set by the user the input range is

±REFIN2.

When cleared by the user the input range is

±REFIN2/2.

NOTES

1. When the temperature sensor is selected, the AD7719 automatically selects its internal reference. The temperature sensor is not factory calibrated. Temp sensor

is suitable for relative temperature measurements. The temperature sensor yields conversion results where a conversion result of 8000H equates to typically 0

°C.

2. A 1

°C change in temperature will normally result in a 256 LSB change in the AD1 data register (ADC conversion result).

Filter Register (A3, A2, A1, A0 = 0, 1, 0, 0; Power-On Reset = 45 Hex)

The Filter Register is an 8-bit register from which data can be read or to which data can be written. This register determines the

amount of averaging performed by the sinc filter. Table XV outlines the bit designations for the Filter Register. FR7 through FR0

indicate the bit location, FR denoting the bits are in the Filter Register. FR7 denotes the first bit of the data stream. The number in

brackets indicates the power-on/reset default status of that bit. The number in this register is used to set the decimation factor and

thus the output update rate for the Main and Aux ADCs. The filter register cannot be written to by the user while either ADC is

active. The update rate is used for both Main and Aux ADCs and is calculated as follows:

f

SF

f

ADC

MOD

=×

×

×

1

3

1

8

where

SF

= Decimal Value Written to SF Register.

shown in Table XV. It should also be noted that both ADC input channels are chopped to minimize offset errors. This means that

the time for a single conversion or the time to the first conversion result is 2

× t

Table XV. Update Rate vs. SF WORD

SF (dec)

SF (Hex)

13

0D

105.3

9.52

69

45

19.79

50.34

255

FF

5.35

186.77

I/O and Current Source Control Register (IOCON): (A3, A2, A1, A0 = 0, 1, 1, 1; Power-On Reset = 0000 Hex)

The IOCON Register is a 16-bit register from which data can be read or to which data can be written. This register is used to control

and configure the various excitation and burnout current source options available on-chip along with controlling the I/O port. Table

XVI outlines the bit designations for this register. IOCON15 through IOCON0 indicate the bit location, IOCON denoting the bits

are in the I/O and Current Source Control Register. IOCON15 denotes the first bit of the data stream. The number in brackets

indicates the power-on/reset default status of that bit. A write to the IOCON register has immediate effect and does not reset the

ADCs. Thus, if a current source is switched while the ADC is converting the user will have to wait for the full settling time of the

filter before getting a fully-settled output. Since the ADC is chopped this equates to three outputs.

5

1

N

O

C

O

I4

1

N

O

C

O

I3

1

N

O

C

O

I2

1

N

O

C

O

I1

1

N

O

C

O

I0

1

N

O

C

O

I9

N

O

C

O

I8

N

O

C

O

I

)

0

(

2

W

S

P1

W

S

P)

0

(0

)

0

(O

B)

0

(N

I

P

2

I)

0

()

1

(

N

I

P

1

I)

0

(

N

E

2

I)

0

(

N

E

1

I

7

N

O

C

O

I6

N

O

C

O

I5

N

O

C

O

I4

N

O

C

O

I3

N

O

C

O

I2

N

O

C

O

I1

N

O

C

O

I0

N

O

C

O

I

)

0

(

R

I

D

4

P)

0

(

R

I

D

3

P)

0

(

N

E

2

P)

0

(

N

E

1

P)

0

(

T

A

D

4

P)

0

(

T

A

D

3

P)

0

(

T

A

D

2

P)

0

(

T

A

D

1

P

FR7

FR6

FR5

FR4

FR3

FR2

FR1

FR0

SF7 (0)

SF6 (1)

SF5 (0)

SF4 (0)

SF3 (0)

SF2 (1)

SF1 (0)

SF0 (1)