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WM8903 Datasheet(PDF) 127 Page - Wolfson Microelectronics plc |
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WM8903 Datasheet(HTML) 127 Page - Wolfson Microelectronics plc |
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127 / 178 page ![]() Production Data WM8903 w PD, Rev 4.5, June 2012 127 POWER-ON RESET The WM8903 includes an internal Power-On-Reset (POR) circuit, which is used to reset the digital logic into a default state after power up. The POR circuit is powered from AVDD and monitors DCVDD. The internal POR ¯¯¯ signal is asserted low when AVDD or DCVDD are below minimum thresholds. The specific behaviour of the circuit will vary, depending on the relative timing of the supply voltages. Typical scenarios are illustrated in Figure 65 and Figure 66. DCVDD Vpord_on 0V AVDD 0V Vpora Vpora_off LO HI Internal POR Device ready POR active POR active POR undefined ADDR/GPIO3 LO HI tpusetup tpuhold Figure 65 Power On Reset timing - AVDD enabled first Figure 66 Power On Reset timing - DCVDD enabled first |
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