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82575EB Datasheet(PDF) 52 Page - Intel Corporation

Part # 82575EB
Description  Intel짰 82575EB Gigabit Ethernet Controller Datasheet
PDF  62 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82575EB Datasheet(HTML) 52 Page - Intel Corporation

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Intel® 82575EB Gigabit Ethernet Controller — NC-SI Interface
Intel® 82575EB Gigabit Ethernet Controller
317679-004
Datasheet
Revision: 2.11
52
January 2011
6.4.3
NC-SI Interface
Table 16.
NC-SI AC Specification
Notes:
1. Clock Duty cycle measurement: High interval measured from Vih to Vil points, Low from Vil to next Vih
2. Clock interval measurement from Vih to Vih
3. Cload = 25 pF
4. Cload = 200 fF
5. The input delay test conditions: Maximum input level = VIN = 2.7V; Input rise/fall time (0.2VIN to 0.8VIN) = 1ns (Slew Rate ~
1.5ns).
6. The NC-SI specification defines a hold time of 1.0 ns. In order to work with the 82575, the board designer should guarantee a hold
time of 1.5 ns.
Symbol
Parameter
Min
Typ
Max
Units
Notes
REF_CLK Frequency
50
MHz
2
REF_CLK Duty Cycle
35
65
%
1
REF_CLK accuracy
100
ppm
Tsu
TXD[1:0], TX_EN, Data Setup to REF_CLK rising
edge
3ns
Thold
TXD[1:0], TX_EN Data hold from REF_CLK rising
edge
1.5
ns
6
Tval
RXD[1:0], CRS_DV Data valid from REF_CLK
rising edge
1.8
9
ns
Tor
RXD[1:0], CRS_DV Output Time rise
0.5
6
ns
3
Tof
RXD[1:0], CRS_DV Output Time fall
0.5
6
ns
3
Todr1
RXD[1:0], CRS_DV Output delay rise
2
5.8
ns
3
Todf1
RXD[1:0], CRS_DV Output delay fall
2
5.8
ns
3
Tidr2
TXD[1:0], TX_EN Input delay rise
0.5
6
ns
4, 5
Tidf2
TXD[1:0], TX_EN Input delay fall
0.5
6
ns
4, 5
Tir
TXD[1:0], TX_EN Input Time rise
0.02
0.15
ns
4, 5
Tif
TXD[1:0], TX_EN Input Time fall
0.02
0.15
ns
4, 5



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