FT800 datasheet(37/55 Pages) FTDI

37 / 55 page

Document No.: FT_000792

FT800

Embedded Video Engine

Datasheet Version 1.1

Clearance No.: FTDI# 334

5.1 FT800 Registers

Table 5.1 shows the complete list of the FT800 registers. Refer to “FT800 Programmer

Guide” (FTDI Doc FT_000793) Chapter 2 for details of the register function.

Table 5-2 Overview of FT800 Registers

Address

Bit

Acce

Reset

value

Description

102400h REG_ID

8 r/o

7Ch Identification register, always reads as

7Ch

102404h

REG_FRAMES

32 r/o

00000000h Frame counter, since reset

102408h

REG_CLOCK

32 r/o

00000000h Clock cycles, since reset

10240Ch

REG_FREQUENCY

27 r/w

02DC6C00h Main clock frequency

102410h

REG_RENDERMODE

1 r/w

00h Rendering mode:

0 = normal, 1 = single-line

102414h

REG_SNAPY

9 r/w

00h Scan line select for RENDERMODE 1

102418h

REG_SNAPSHOT

1 r/o

- trigger for RENDERMODE 1

10241Ch

REG_CPURESET

1 r/w

00h Graphics, audio and touch engines

reset control

102420h

REG_TAP_CRC

32 r/o

- Live video tap crc. Frame CRC is

computed every DL SWAP.

102424h

REG_TAP_MASK

32 r/w

FFFFFFFFh Live video tap mask

102428h

REG_HCYCLE

10 r/w

224h Horizontal total cycle count

10242Ch

REG_HOFFSET

10 r/w

02Bh Horizontal display start offset

102430h

REG_HSIZE

10 r/w

1E0h Horizontal display pixel count

102434h

REG_HSYNC0

10 r/w

000h Horizontal sync fall offset

102438h

REG_HSYNC1

10 r/w

029h Horizontal sync rise offset

10243Ch

REG_VCYCLE

10 r/w

124h Vertical total cycle count

102440h

REG_VOFFSET

10 r/w

00Ch Vertical display start offset

102444h

REG_VSIZE

10 r/w

110h Vertical display line count

102448h

REG_VSYNC0

10 r/w

000h Vertical sync fall offset

10244Ch

REG_VSYNC1

10 r/w

00Ah Vertical sync rise offset

102450h

REG_DLSWAP

2 r/w

00h Display list swap control

102454h

REG_ROTATE

1 r/w

00h Screen 180 degree rotate

102458h

REG_OUTBITS

9 r/w

1B6h Output bit resolution, 3x3x3 bits

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