AD9142 datasheet(41/65 Pages) AD

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Data Sheet

AD9142

Rev. 0 | Page 41 of 64

EXAMPLE START-UP ROUTINE

To ensure reliable start-up of the AD9142, certain sequences

must be followed. This section shows an example start-up

routine.

Device Configuration and Start-Up Sequence

•

fDATA = 200 MHz, interpolation is 8×.

•

Input data is baseband data.

•

fOUT = 350 MHz.

•

PLL is enabled, fREF = 200 MHz.

•

Fine NCO is enabled, inverse sinc filter is enabled.

•

A delay line-based mode is used with an interface delay

setting of 0.

Derived PLL Settings

The following PLL settings can be derived from the device

configuration:

•

fDAC = 200 × 8 = 1600 MHz.

•

fVCO= fDAC = 1600 MHz (1 GHz < fVCO < 2 GHz).

•

VCO divider = fVCO/fDAC = 1.

•

Loop divider = fDAC/fREF = 8.

Derived NCO Settings

The following NCO settings can be derived from the device

configuration:

•

fDAC = 200 × 8 = 1600 MHz.

•

fCARRIER = fOUT = 350 MHz.

•

FTW = fCARRIER/fDAC × 232 = 0x38000000.

Start-Up Sequence

1. Power up the device (no specific power supply sequence is

required).

2. Apply stable DAC clock.

3. Apply stable DCI clock.

4. Feed stable input data.

5. Issue H/W reset (optional).

/* Device configuration register write

sequence. Must be written in sequence for every

device after reset*/

0x00 → 0x20 /* Issue software reset */

0x20

→ 0x01 /* Device Startup Configuration */

0x79

→ 0x18 /* Device Startup Configuration */

0x80

→ 0xAD /* Device Startup Configuration */

0xE1

→ 0x1A /* Device Startup Configuration */

/* Configure PLL */

0x14 → 0xE3 /* Configure PLL loop BW and charge

pump current */

0x15

→ 0xC2 /* Configure VCO divider and Loop

divider */

0x12 → 0xC0 /*Enable the PLL */

0x12

→ 0x80

/* Configure Data Interface */

0x5E → 0x00 /* Delay setting 0 */

0x5F → 0x08 /* Enable the delay line */

/* Configure Interpolation filter */

0x28 → 0x03 /* 8× interpolation */

/* Reset FIFO */

0x25

→ 0x01

Read 0x25[1] /* Expect 1b if the FIFO reset is

complete */

Read 0x24 /* The readback should be one of the

three values: 0x37, 0x40, or 0x41 */

/* Configure NCO */

0x27→ 0x40 /* Enable NCO */

0x31

→ 0x00

0x32

→ 0x00

0x33

→ 0x00

0x34

→ 0x38

0x30

→ 0x01

Read 0x30[1] /* Expect 1b if the NCO update is

complete */

/* Enable Inverse SINC filter */

0x27

→ 0xC0

/* Power up DAC outputs */

0x01 → 0x00

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