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APA150 Datasheet(PDF) 172 Page - Actel Corporation

Part # APA150
Description  Ultra-Fast Local and Long-Line Network
PDF  174 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ACTEL [Actel Corporation]
Direct Link  http://www.actel.com
Logo ACTEL - Actel Corporation

APA150 Datasheet(HTML) 172 Page - Actel Corporation

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ProASICPLUS Flash Family FPGAs
3- 6
v5.2
Advanced v0.6
(continued)
Table 1-1 was updated.
page 1-7
Figure 1-14 was updated.
page 1-14
The "Design Environment" section was updated.
page 1-27
The "Package Thermal Characteristics" section was updated.
page 1-29
The "Calculating Typical Power Dissipation" section was updated.
page 1-30
The "Absolute Maximum Ratings*" section was updated.
page 1-33
The "Programming, Storage, and Operating Limits" section was updated.
page 1-33
The ’Nominal Supply Voltages’ section was updated.
page 1-34
The "Recommended Operating Conditions" section was updated.
page 1-35
The "DC Electrical Specifications (VDDP = 2.5 V ±0.2V)" section was updated.
page 1-36
The "DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V)" section was
updated.
page 1-38
The "Synchronous Write and Read to the Same Location" section was updated.
page 1-61
The "Asynchronous Write and Synchronous Read to the Same Location" section was updated. page 1-62
The "Asynchronous FIFO Read" section was updated.
page 1-67
The "Pin Description" section has been updated.
page 1-73
The "Recommended Design Practice for VPN/VPP" section is new.
page 1-74
The "100-Pin TQFP" section is new.
page 2-1
The "484-Pin FBGA" section is new.
page 2-45
Advanced v0.5
The description for the VPN pin has changed.
page 1-74
Advanced v0.4
The "Plastic Device Resources" section has been updated.
page i-ii
Figure 1-12 and Figure 1-13 have been updated.
page 1-14
The "Tristate Buffer Delays" section has been updated.
page 1-42
The "Output Buffer Delays" section has been updated.
page 1-44
The "Input Buffer Delays" section has been updated.
page 1-46
The "Global Input Buffer Delays" section has been updated.
page 1-48
The "456-Pin PBGA" section has been updated.
page 2-22
The "676-Pin FBGA" section has been updated.
page 2-51
Advanced v0.3
The "ProASICPLUS Product Profile" section has been changed.
page i-i
The "Plastic Device Resources" section has been updated.
page i-ii
The "ProASICPLUS I/O Power Supply Voltages" sectionhas been updated.
page 1-9
WDATA has ben changed to DI, and RDATA has been changed to DO to make them consistent
with the signal names found in the Macro Library Guide.
Figure 1-21 and Figure 1-22 have been updated.
page 1-24
and page 1-25
The "Design Environment" section and Figure 1-26 have been updated.
page 1-27
and page 1-42
The table in the "Package Thermal Characteristics" section has been updated.
page 1-29
The "Calculating Typical Power Dissipation" section is new.
page 1-30
The "Programming, Storage, and Operating Limits" section is new.
page 1-33
The ’Nominal Supply Voltages’ section has been updated.
page 1-34
The "DC Electrical Specifications (VDDP = 2.5 V ±0.2V)" section was updated.
page 1-36
The "DC Electrical Specifications (VDDP = 3.3 V ±0.3 V and VDD = 2.5 V ±0.2 V)" section was
updated.
page 1-38
The "Recommended Operating Conditions" section was updated.
page 1-35
The "ProASICPLUS Clock Management System" section was updated.
page 1-13
Previous version
Changes in current version (v5.2)
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