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UPD7564 Datasheet(PDF) 3 Page - NEC |
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UPD7564 Datasheet(HTML) 3 Page - NEC |
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3 / 56 page  RESET VDD VSS INSTRUCTION DECODER STANDBY CONTROL SYSTEM CLOCK GENERATOR PROGRAM MEMORY 1024 × 8 BITS PROGRAM COUNTER (10) P00/INT0 CL CLOCK CONTROL TIMER/EVENT COUNTER TEST CONTROL SERIAL INTERFACE PORT0 BUFFER PORT8 LATCH BUFFER PORT10 LATCH BUFFER PORT11 LATCH BUFFER 4 P00–P03 3 P80–P82 4 P100–P103 4 P110–P113 A (4) C H (2) L (4) STACK POINTER (6) DATA MEMORY 64 × 4 BITS ALU INT0 P01/SCK P03/SI P02/SO φ CL CL1 CL2 CP GENERAL REGISTERS |
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