UPD7564 datasheet(18/56 Pages) NEC

18 / 56 page

µPD7564A, 7564A(A)

2.9

SYSTEM CLOCK GENERATOR

The system clock generator contains an ceramic oscillator, 1/2 divider, and standby (STOP/HALT) mode control

circuit.

Fig. 2-9 System Clock Generator

HALT RELEASE

RESET (

)

(To CPU)

CL (System Clock)

RESET (High)

HALT*

STOP*

HALT F/F

STOP F/F

CL1

CL2

1/2

Ceramic

Oscillator

* Instruction execution

Oscillator

Stop

RESET (

)

The ceramic oscillator oscillates with a ceramic resonator R connected to pins CL1 and CL2.

The ceramic oscillator outputs the system clock (CL) which is 1/2 divided to the CPU clock (

φ).

The control circuit in the standby mode consists mainly of STOP F/F and HALT F/F.

The STOP F/F is set by the STOP instruction to stop ceramic oscillation, blocking every clock from being supplied

(STOP mode). The STOP F/F is reset by the RESET input (high level) to restart ceramic oscillation. When the RESET

input returns to the low level after that, the oscillator once more supplys each clock.

The HALT F/F is set by the HALT instruction to disable the input to the 1/2 divider which generates the CPU clock

φ, stopping only the CPU clock φ (HALT mode).

The HALT F/F is reset at the fall of the HALT RELEASE signal (which goes active when even one test request flag

is set) or the RESET input signal, causing the oscillator to start supplying the CPU clock

φ.

The HALT F/F remains on for the same function of the HALT mode even while the RESET input is active (high).

When a power-on reset occurs, ceramic oscillation starts at rise of the RESET input signal. However, it takes a

certain time for the oscillation output level to be stabilized after the start of oscillation. To prevent the CPU from

malfunctioning by unstable clock pulses, the standby mode control circuit sets the HALT F/F while the RESET input

remains high to suppress the CPU clock

φ. Thus the high-level duration of the RESET input must be set so that it

exceeds the stabilizing time required for the ceramic resonator to be used.

UPD7564 Datasheet(PDF) 18 Page - NEC

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