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UPD7564 Datasheet(PDF) 6 Page - NEC |
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UPD7564 Datasheet(HTML) 6 Page - NEC |
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6 / 56 page ![]() 6 µPD7564A, 7564A(A) 1. PIN FUNCTIONS 1.1 PORT FUNCTIONS Pin Name Input/Output Dual-Function Function After RESET Input/Output Pin Circuit P00 Input INT0 S P01 Input/output SCK Input X P02 SO W P03 Input SI S P80 to P82 Output –– O P100 to P103 Input/output –– P P110 to P113 Input/output –– 1.2 OTHER THAN PORTS Pin Name Input/Output Dual-Function Function After RESET Input/Output Pin Circuit INT0 Input P00 Edge detection testable input pin (Rising edge) S SCK Input/output P01 Serial clock Input/output pin Input X SO Output P02 Serial data output pin Input W SI Input P03 Serial data input pin Input S CL1 –– CL2 RESET R VDD Positive power supply pin VSS GND potential pin 4-bit input port (Port 0) P00 serves also as a count clock (event pulse) input. 3-bit output port (Port 8) High current (15 mA), middle-high voltage (9 V) output 4-bit I/O port (Port 10) Middle-high current (10 mA), middle-high voltage (9 V) input/output 4-bit I/O port (Port 11) Middle-high current (10 mA), middle-high voltage (9 V) input/output High impedance High impedance or high-level output Connection pin for ceramic oscillation ceramic resonator System reset input pin (high-level active) A pull-down resistor can be incorporated using the mask option. |
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