AS260 datasheet(10/45 Pages) ONSEMI

10 / 45 page

AR0260 DS Rev. G Pub. 4/15 EN

©Semiconductor Components Industries, LLC,2015.

AR0260: 1/6-Inch 1080P High-Definition (HD) Digital Image Sensor

Decoupling Capacitor Recommendations

It is important to provide clean, well regulated power to each power supply. The ON

Semiconductor recommendation for capacitor placement and values are based on our

internal demo camera design and verified in hardware. Note: Because hardware design

is influenced by many factors, such as layout, operating conditions, and component

selection, the customer is ultimately responsible to ensure that clean power is provided

for their own designs.

In order of preference, ON Semiconductor recommends:

1. Mount 0.1F and 1F decoupling capacitors for each power supply as close as possi-

ble to the pad and place a 10 F capacitor nearby off-module.

2. If module limitations allow for only six decoupling capacitors for a three-regulator

design use a 0.1F and 1F capacitor for each of the three regulated supplies. ON

Semiconductor also recommends placing a 10F capacitor for each supply off-mod-

ule, but close to each supply.

3. If module limitations allow for only three decoupling capacitors, use a 1F capacitor

(preferred) or a 0.1F capacitor for each of the three regulated supplies. ON Semicon-

ductor recommends placing a 10F capacitor for each supply off-module but close to

each supply.

4. Give priority to the VAA supply for additional decoupling capacitors.

5. Inductive filtering components are not recommended.

6. Follow best practices when performing physical layout. Refer to technical note TN-

09-131.

Power-Up Sequence

Powering up the sensor requires voltages to be applied in a particular order, as seen in

Figure 3. The timing requirements are shown in Table 4. The sensor includes a power-on

reset feature that initiates a reset upon power up of the sensor.

Figure 3:

Power-Up Sequence

Table 4:

Power-Up Signal Timing

Symbol Parameter

Min

Max

Unit

Delay from REG_IN0 and VDD_PHY to VDD_IO

200

t2Delay from VDD_IO to VAA and VAA_PIX

t3EXTCLK activation

–

VAA, VAA_PIX

EXTCLK

REG_IN0, VDD_PHY

VDD_IO

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