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RFILTER

RCS

LM5045

RAMP

CLK + LEB

CLK

Current

Sense

CFILTER

SLOPE

100 2A

RFILTER

RCS

LM5045

RAMP

CLK + LEB

CLK

Current

Sense

CFILTER

SLOPE

100 2A

RSLOPE

(a)

(b)

LM5045

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SNVS699H – FEBRUARY 2011 – REVISED JANUARY 2015

Feature Description (continued)

pin but CS pin will not see any slope compensation. Therefore, in this scheme slope compensation will not

affect the current limit.

•

In a second configuration, as shown in Figure 11(b), the SLOPE, RAMP and CS pins can be tied together. In

this configuration the ramping current source from the SLOPE pin will flow through the filter resistor and filter

capacitor, therefore both the CS pin and the RAMP pin will see the current sense signal plus the slope

compensation ramp. In this scheme, the current limit is compensated by the slope compensation and the

current limit onset point will vary.

If the slope compensation is not required for example, in feed-forward voltage mode control, the SLOPE pin must

be connected to the AGND pin. When the RT pin is synched to an external clock, it is recommended to disable

the SLOPE pin and add slope compensation externally by connecting an appropriate resistor from the VCC pin to

the CS pin. Refer to the Application and Implementation section for more details.

Slope Compensation Configured for PWM Only (No Current Limit Slope)

Slope Compensation Configured for PWM and Current Limit

Figure 11. Slope Compensation Configuration

7.3.11 Soft-Start

The soft-start circuit allows the power converter to gradually reach a steady state operating point, thereby

reducing the start-up stresses and current surges. When bias is supplied to the LM5045, the SS capacitor is

discharged by an internal MOSFET. When the UVLO, VCC and REF pins reach their operating thresholds, the

SS capacitor is released and is charged with a 20-µA current source. Once the SS pin voltage crosses the 1-V

offset, SS controls the duty cycle. The PWM comparator is a three input device; it compares the RAMP signal

against the lower of the signals between the soft-start and the loop error signal. In a typical isolated application,

as the secondary bias is established, the error amplifier on the secondary side soft-starts and establishes closed-

loop control, steering the control away from the SS pin.

One method to shutdown the regulator is to ground the SS pin. This forces the internal PWM control signal to

ground, reducing the output duty cycle quickly to zero. Releasing the SS pin begins a soft-start cycle and normal

operation resumes. A second shutdown method is presented in the UVLO and OVP Voltage Divider Selection

section.

7.3.12 Gate Driver Outputs

The LM5045 provides four gate drivers: two floating high-side gate drivers HO1 and HO2 and two ground

referenced low-side gate drivers LO1 and LO2. Each internal driver is capable of source 1.5-A peak and sinking

2-A peak. Initially, the diagonal HO1 and LO2 are turned-on together, followed by an off-time when all the four

gate driver outputs are off. In the subsequent phase the diagonal HO2 and LO1 are turned on together followed

by an off-time. The low-side gate drivers are powered directly by the VCC regulator. The HO1 and HO2 gate

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