LM5045 datasheet(18/46 Pages) TI

18 / 46 page

CLK

HO1,LO2

HO2,LO1

Tonmax

Tosc

FOSC

TOSC =

T1 ,RD1

DMAX =

- (T1)

FOSC

)

(

FOSC

)

(

LM5045

SNVS699H – FEBRUARY 2011 – REVISED JANUARY 2015

www.ti.com

Feature Description (continued)

drivers are powered from a bootstrap capacitor connected between BST1/BST2 and HS1/HS2, respectively. An

external diode connected between VCC (anode pin) and BST (cathode pin) provides the high-side gate driver

power by charging the bootstrap capacitor from VCC when the corresponding switch node (HS1/HS2 pin) is low.

When the high side MOSFET is turned on, BST1 rises to a peak voltage equal to VCC + VHS1 where VHS1 is the

switch node voltage.

The BST and VCC capacitors should be placed close to the pins of the LM5045 to minimize voltage transients

due to parasitic inductances because the peak current sourced to the MOSFET gates can exceed 1.5 A. The

recommended value of the BST capacitor is 0.1

μF or greater. A low ESR / ESL capacitor, such as a surface

mount ceramic, should be used to prevent voltage droop during the HO transitions.

If the COMP pin is open circuit, the outputs will operate at maximum duty cycle. The maximum duty cycle for

each phase is limited by the dead-time set by the RD1 resistor. If the RD1 resistor is set to zero then the

maximum duty cycle is slightly less than 50% due to the internally fixed dead-time. The internally fixed dead-time

is 30ns which does not vary with the operating frequency. The maximum duty cycle for each output can be

calculated from the following equation:

where

•

T1 is the time set by the RD1 resistor

•

FOSC is the frequency of the oscillator

(2)

For example, if the oscillator frequency is set at 400 kHz and the T1 time set by the RD1 resistor is 60 ns, the

resulting DMAX will be equal to 0.488.

Figure 12. Timing Diagram Illustrating the Maximum Duty Cycle and Dead-Time Set by RD1

7.3.13 Synchronous Rectifier Control Outputs (SR1 and SR2)

Synchronous rectification (SR) of the transformer secondary provides higher efficiency, especially for low output

voltage converters, compared to the diode rectification. The reduction of rectifier forward voltage drop (0.5 V to

1.5 V) to 10 mV to 200 mV VDS voltage for a MOSFET significantly reduces rectification losses. In a typical

application, the transformer secondary winding is center tapped, with the output power inductor in series with the

center tap. The SR MOSFETs provide the ground path for the energized secondary winding and the inductor

current. From Figure 13 it can be seen that when the HO1/LO2 diagonal is turned ON, power transfer is enabled

from the primary. During this period, the SR1 MOSFET is enabled and the SR2 MOSFET is turned-off. The

secondary winding connected to the SR2 MOSFET drain is twice the voltage of the center tap at this time. At the

Submit Documentation Feedback

Product Folder Links: LM5045

LM5045 Datasheet(PDF) 18 Page - Texas Instruments

LM5045 Datasheet(HTML) 18 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Download

Link URL