LM5045 datasheet(19/46 Pages) TI

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HO1, LO2

SR2

HO2, LO1

SR1

RD(1,2) =

T(1,2)

3 pF

; For 20k < (1,2) < 100k

LM5045

www.ti.com

SNVS699H – FEBRUARY 2011 – REVISED JANUARY 2015

Feature Description (continued)

conclusion of the HO1/LO2 pulse, the inductor current continues to flow through the SR2 MOSFET body diode.

Because the body diode causes more loss than the SR MOSFET, efficiency can be improved by minimizing the

T2 period while maintaining sufficient timing margin over all conditions (component tolerances, etc.) to prevent

the shoot-through current. When HO2/LO1 enables power transfer from the primary, the SR2 MOSFET is

enabled and the SR1 MOSFET is off.

During the freewheeling period, the inductor current is almost equally shared between both the SR1 and SR2

MOSFETs which effectively shorts the transformer secondary. The SR2 MOSFET is disabled before HO1/LO2 is

turned-on. The SR2 MOSFET body diode continues to carry about the half inductor current until the primary

power raises the SR2 MOSFET drain voltage and reverse biases the body diode. Ideally, dead-time T1 would be

set to the minimum time that allows the SR MOSFET to turn off before the SR MOSFET body diode starts

conducting.

The SR drivers are powered by the REF regulator and each SR output is capable of sourcing 0.1 A and sinking

0.4-A peak. The amplitude of the SR drivers is limited to 5 V. The 5-V SR signals enable the LM5045 to transfer

SR control across the isolation barrier either through a solid-state isolator or a pulse transformer. The actual gate

sourcing and sinking currents for the synchronous MOSFETs are provided by the secondary-side bias and gate

drivers.

T1 and T2 can be programmed by connecting a resistor between RD1 and RD2 pins and AGND. It should be

noted that while RD1 effects the maximum duty cycle, RD2 does not. The RD1 and RD2 resistors should be

located very close to the device. The formula for RD1 and RD2 resistors are given below:

(3)

If the desired dead-time for T1 is 60ns, then the RD1 will be 20 k

Ω.

Figure 13. Synchronous Rectifier Timing Diagram

7.3.14 Soft-Start of the Synchronous Rectifiers

In addition to the basic soft-start already described, the LM5045 contains a second soft-start function that

gradually turns on the synchronous rectifiers to their steady-state duty cycle. This function keeps the

synchronous rectifiers off during the basic soft-start allowing a linear start-up of the output voltage even into pre-

biased loads. Then the SR output duty cycle is gradually increased to prevent output voltage disturbances due to

the difference in the voltage drop between the body diode and the channel resistance of the synchronous

MOSFETs. Initially, when bias is supplied to the LM5045, the SSSR capacitor is discharged by an internal

MOSFET. When the SS capacitor reaches a 2-V threshold and once it is established that COMP is in control of

the duty cycle such as ICOMP < 800 µA, the SSSR discharge is released and SSSR capacitor begins charging

with a 20-µA current source. Once the SSSR cap crosses the internal 1-V threshold, the LM5045 begins the soft-

start of the synchronous FETs. The SR soft-start follows a leading edge modulation technique such as the

leading edge of the SR pulse is soft-started as opposed trailing edge modulation of the primary FETs. As shown

in the Figure 14(a), SR1 and SR2 are turned-on simultaneously with a narrow pulse-width during the

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